Board card detection method

Abstract

A board card detection method, for detecting whether a to-be-detected board card inserted into a motherboard is a target support card, is implemented by a control module and a clock generation unit mounted to the motherboard. The board card detection method includes: (A) the clock generation unit outputting a first clock signal, and the control module outputting a second clock signal to a first input-output pin of the motherboard according to the first clock signal; (B) the control module receiving a to-be-detected signal via a second input-output pin of the motherboard; (C) the control module determining whether the to-be-detected signal matches the first clock signal; (D) after determining that the to-be-detected signal matches the first clock signal, the control module determining that the to-be-detected board card is the target support card and outputting an output signal.

Description

[Technical Field]

[0001] This invention relates to the field of server technology, and in particular to a board detection method. [Previous Technology]

[0002] A server system typically includes a motherboard, connectors and cards, and the cards are connected to the motherboard through plug-in connectors to communicate and operate with the motherboard.

[0003] Existing motherboards have a pull-up resistor circuit, which outputs a high potential to a first input / output pin and a second input / output pin of the motherboard. Currently, the method for determining whether a card inserted into the motherboard is a target support card is as follows: when the target support card is installed on the motherboard, a pull-up resistor circuit of the target support card will electrically connect the first input / output pin and the second input / output pin, causing the input / output pins to switch to a low potential due to the influence of the pull-down resistor circuit, thereby determining that the card installed on the motherboard is the correct target support card.

[0004] However, due to the increasing variety of circuit boards on the market, there are many other circuit boards that have grounded circuits for both the first input / output pin and the second input / output pin, which are different from the target support card. This causes the motherboard to mistakenly identify the other circuit board as the target support card and start communicating and operating with the target support card, causing abnormalities in the motherboard. Alternatively, the motherboard may provide high voltages that the other circuit board does not support to the other circuit board, causing the other circuit board to burn out. [Summary of the Invention]

[0005] Therefore, the object of the present invention is to provide a board detection method that can overcome the shortcomings of the prior art.

[0006] The present invention provides a board detection method for detecting whether a board to be detected inserted into a motherboard is a target support card, and is implemented by a logic device installed on the motherboard. The logic device includes a control module and a clock generation unit electrically connected to the control module. The board detection method includes: (A) the clock generation unit outputs a first clock signal, and the clock generation unit outputs a second clock signal to a first input / output pin of the motherboard according to the first clock signal, wherein the first clock signal and the second clock signal have the same period; (B) the control module receives a signal to be detected through a second input / output pin of the motherboard; (C) the control module determines whether the signal to be detected matches the first clock signal; (D) after determining that the signal to be detected matches the first clock signal, the control module determines that the board to be detected is the target support card and outputs an output signal.

[0007] In some embodiments of the board detection method of the present invention, when the target support card is inserted into the motherboard, the first input / output pin and the second input / output pin are electrically connected.

[0008] In some embodiments of the board detection method of the present invention, the motherboard is further equipped with a switching device and provides a first power supply voltage, and the control module includes a first detection circuit, a second detection circuit and a logic unit, wherein: in step (C), the first detection circuit detects whether there is a first logic value for the signal to be detected at the positive edge defined by the first clock signal, and the second detection circuit detects whether there is a second logic value for the signal to be detected at the negative edge defined by the first clock signal. When the first detection circuit detects that the signal to be detected has the first logic value, the output first signal is the first logic value. When the first detection circuit detects that the signal to be detected does not have the first logic value, the output first signal is the second logic value. When the second detection circuit detects that the signal to be detected has the second logic value, the output first signal is the second logic value. The output second signal is the first logic value. When the second detection circuit detects that the signal to be detected does not have the second logic value, the output second signal is the second logic value. In step (D), the logic unit receives the first signal output by the first detection circuit and the second signal output by the second detection circuit, and outputs the output signal to the switching device. When the first signal is at the first logic value and the second signal is at the first logic value, the switching device turns on the first power supply voltage to supply power to the board to be detected. The switching device includes a control terminal that receives the output signal, a first terminal that receives the first power supply voltage, and a second terminal that is electrically connected to a third input / output pin. When the first signal is at the first logic value and the second signal is at the first logic value, the first terminal and the second terminal of the switching device are turned on, so that the first power supply voltage supplies power to the board to be detected.

[0009] In some embodiments of the board detection method of the present invention, the motherboard is also equipped with an alarm device. In step (C), the logic unit also outputs the output signal to the alarm device. When the first detection circuit outputs the first signal at the second logic value, or the second detection circuit outputs the second signal at the second logic value, the switching device cuts off the first power supply voltage to the board to be detected, and the alarm device outputs an abnormal warning notification according to the output signal.

[0010] In some embodiments of the board detection method of the present invention, the method further includes the following steps prior to step (C): (E) The control module determines whether the host board and the board to be detected are in a connected state based on the signal to be detected; (F) When the control module determines that the host board and the board to be detected are in a connected state, step (C) is executed.

[0011] In some embodiments of the board detection method of the present invention, in step (E), when the control module determines that there is a change in the voltage level of the signal to be detected, it determines that the host board and the board to be detected are in a connected state.

[0012] The advantage of this invention is that: by using the control module to determine whether the signal to be detected matches the first clock signal, the motherboard controls the first power supply voltage to supply power or not supply power to the card to be detected according to the output signal. Furthermore, if the card to be detected is not the target support card, the warning device outputs an abnormal warning notification according to the output signal to remind the user to insert the wrong card. This determines whether the card to be detected installed on the motherboard is the target support card, preventing the motherboard from continuing to supply power when an incorrect card is inserted, thus avoiding server system failure or card burnout.

Implementation Method

[0013] Referring to FIG1, a board detection system 100 of the present invention for performing a board detection method is shown in one embodiment. The board detection system 100 includes a motherboard 1, a connector 2, a board to be detected 3, and a power module 4. The board detection method is used to detect whether the board to be detected 3 inserted into the motherboard 1 is a target support card, and is implemented by a logic device (not shown) disposed on the motherboard 1. The logic device includes a control module 11 and a clock generation unit 12 electrically connected to the control module 11. In this embodiment, the logic device is a programmable device, such as a Complex Programmable Logic Device (CPLD), a microcontroller unit (MCU), or a Field Programmable Gate Array (FPGA) or other programmable chips.

[0014] The motherboard 1 includes a first input / output pin 13, a second input / output pin 14, a third input / output pin 15, a switch device 16, an alarm device 17, and a pull-up resistor R. It should be noted that although this embodiment only shows the first input / output pin 13, the second input / output pin 14, and the third input / output pin 15 in Figure 1, this is only to illustrate the principle of the board detection method of the present invention. The actual number of pins is not limited to this embodiment and will not be elaborated upon here.

[0015] The power module 4 is used to provide power to the motherboard 1 and the detection board 3. In this embodiment, the power module 4 outputs a first power supply voltage V1 and a second power supply voltage V2, which are, for example, equal to 12 volts and 3.3 volts respectively, but are not limited thereto; they can also be 24 volts, 18 volts, or 5 volts, etc. However, in other embodiments, the first power supply voltage V1 and / or the second power supply voltage V2 can also be provided by an external power supply different from that of the power module 4.

[0016] The pull-up resistor R includes a pull-up terminal and a contact terminal, the pull-up terminal being electrically connected to the second power supply voltage V2. In this embodiment, the contact terminal of the pull-up resistor R is electrically connected to the control module 11 and the second input / output pin 14. However, in other embodiments, the contact terminal of the pull-up resistor R is electrically connected to the clock generation unit 12 and the first input / output pin 13, and is not limited thereto. The following example uses the connection of the contact terminal of the pull-up resistor R to the control module 11 and the second input / output pin 14.

[0017] The connector 2 is electrically connected to the motherboard 1 and may be, for example, a 4C+ connector conforming to the SFF-TA-1002 standard. In this embodiment, the connector 2 includes a first pin PINA7 electrically connected to the first input / output pin 13 and a second pin PINB58 electrically connected to the second input / output pin 14.

[0018] In this embodiment, the card to be detected 3 is, for example, a network interface card of a Data Center-ready Secure Control Module (DC-SCM) 1.0, a network interface card of DC-SCM 2.0, or a network interface card (OCP NIC 3.0) compliant with the Open Compute Project (OCP) 3.0.

[0019] In this embodiment, the target support card is, for example, a network interface card supporting the DC-SCM 2.0 specification. When the target support card is electrically connected to the connector 2 of the motherboard 1, a short circuit is formed between the first input / output pin 13 and the second input / output pin 14. Specifically, when the target support card is inserted into the motherboard 1, since the two pins of the target support card that are respectively connected to the first pin PINA7 and the second pin PINB58 are electrically connected, a short circuit is formed between the first pin PINA7 and the second pin PINB58. Therefore, a short circuit is also formed between the first input / output pin 13 and the second input / output pin 14. It should be noted that, for the sake of clarity in the following explanation, both the DC-SCM 1.0 board and the OCP NIC 3.0 board are referred to as non-target support cards.

[0020] The control module 11 selectively controls the first power supply voltage V1 to supply power to the target board 3 through the third input / output pin 15 of the motherboard 1.

[0021] The clock generation unit 12 is coupled to the first input / output pin 13 and includes a delay unit (not shown). The clock generation unit 12 is used to generate a first clock signal CLK1 with a specific frequency.

[0022] The clock generation unit 12 generates a second clock signal CLK2 by delaying the first clock signal CLK1 through the delay unit. In this embodiment, the second clock signal CLK2 output by the clock generation unit 12 has the same period as the first clock signal CLK1 and the phase difference between them is 0 or 180 degrees. However, in other embodiments, the delay unit delays the first clock signal CLK1 by a delay time (e.g., 100 milliseconds) to generate the second clock signal CLK2. The delay time can be preset by the user, preset by the system, or obtained by the system based on the period of the first clock signal CLK1. The delay time is N periods of the first clock signal, where 0 < N < 0.5.

[0023] The control module 11 is coupled to the clock generation unit 12 and the second input / output pin 14, and receives the first clock signal CLK1 and a signal to be detected P to generate an output signal. In this embodiment, the control module receives the signal to be detected P through the second input / output pin 14. Furthermore, before the detection board 3 is inserted into the motherboard 1, the voltage level of the signal to be detected P is the logic value corresponding to a high voltage level, that is, a first logic value (i.e., logic 1). The control module 11 includes a first detection circuit 111, a second detection circuit 112, and a logic unit 113. The first detection circuit 111 and the second detection circuit 112 sample the signal to be detected P according to the period of the first clock signal CLK1.

[0024] In this embodiment, the logic unit 113 includes an AND gate for receiving a first signal from the first detection circuit 111 and a second signal from the second detection circuit 112 to generate the output signal. In other words, when the logic values ​​of the first signal and the second signal are both the first logic value corresponding to a high voltage level (i.e., logic 1), the logic value of the output signal is the first logic value corresponding to a high voltage level (i.e., logic 1); when at least one of the logic values ​​of the first signal and the second signal is a second logic value corresponding to a low voltage level (i.e., logic 0), the logic value of the output signal is the second logic value corresponding to a low voltage level (i.e., logic 0).

[0025] It should be further noted that the specific implementation of the control module 11, the first detection circuit 111, the second detection circuit 112, the logic unit 113, and the clock generation unit 12 can be physical circuits or functional modules operated by the firmware of the logic device.

[0026] The switching device 16 includes a control terminal coupled to the control module 11, a first terminal receiving the first power supply voltage V1, and a second terminal electrically connected to the third input / output pin 15.

[0027] Referring to Figures 1 and 2, this embodiment of the board detection method of the present invention includes steps S11 to S17.

[0028] In step S11, the clock generation unit 12 outputs the first clock signal CLK1, and the control module 11 outputs the second clock signal CLK2 to the first input / output pin 13 of the motherboard 1 according to the first clock signal CLK1.

[0029] In step S12, the control module 11 receives the signal P to be detected through the second input / output pin 14 of the motherboard 1.

[0030] In step S13, the control module 11 determines whether the voltage level of the signal to be detected P has changed, in order to determine whether the motherboard 1 and the board to be detected 3 are connected. If the determination result is yes, the process proceeds to step S14; if the determination result is no, the process returns to step S13. In this embodiment, the control module 11 determines that the voltage level of the signal to be detected P has changed by determining whether the signal to be detected P has changed from the first logic value to the second logic value. The first logic value is equal to logic 1, and the second logic value is equal to logic 0. In other embodiments, the first logic value and the second logic value can also be equal to logic 0 and logic 1, respectively.

[0031] Specifically, if the board to be detected 3 is a DC-SCM 1.0 board or an OCP NIC 3.0 board, and when the board to be detected 3 is inserted into the connector 2 of the motherboard 1 designed to connect to the target support card, the second pin PINB58 of the connector 2 is electrically connected to a ground point on the DC-SCM 1.0 board or the OCP NIC 3.0 board, so that the logic value of the signal to be detected P is maintained at the second logic value (i.e., logic 0); on the other hand, if the board to be detected 3 is the target support card, the first input / output pin 13 and the second input / output pin 14 are electrically connected through the target support card, so that the second clock signal CLK2 will be transmitted back to the motherboard 1 through the target support card and the second input / output pin 14. Therefore, the second clock signal CLK2 and the signal to be detected P are almost identical.

[0032] In step S14, the control module 11 determines whether the signal to be detected P matches the first clock signal CLK1. If the control module 11 determines that it is yes, the process proceeds to step S15; if the control module 11 determines that it is no, the process proceeds to step S16.

[0033] In this embodiment, before the target support card is installed on the connector 2 of the motherboard 1, the control module 11 is electrically connected to the pull-up resistor R, so that the control module 11 receives the detection signal P which is only affected by the pull-up resistor R and presents a high voltage level setting voltage. That is, before the target support card is installed on the connector 2 of the motherboard 1, the control module 11 detects the detection signal P corresponding to the first logic value. At this time, the control module 11 samples the signal P to be detected for a first logic value (high voltage level) according to the period of the first clock signal CLK1. When the sampling result is the first logic value, a first signal corresponding to the first logic value (high voltage level) is generated to the logic unit 113; otherwise, a first signal corresponding to the second logic value (low voltage level) is generated to the first detection circuit 111. In another embodiment, the signal P to be detected can also be sampled for a preset number of times according to the period of the first clock signal CLK1. When the sampling result is the first logic value, a first signal corresponding to the first logic value (high voltage level) is generated to the first detection circuit 111; otherwise, a first signal corresponding to the second logic value (low voltage level) is generated to the first detection circuit 111. Therefore, after the motherboard 1 is powered on and the voltage stabilizes, the control module 11 can detect the signal P to be detected, which presents a constant voltage and corresponds to the first logic value. Then, after the target support card is installed on the connector 2 of the motherboard 1, the control module 11 receives the second clock signal CLK2 that is transmitted back through the target support card, and uses it as the signal P to be detected for matching analysis. Since the first input / output pin 13 and the second input / output pin 14 are electrically connected through the target support card, the signal P to be detected is matched with the first clock signal CLK1. At this time, if the voltage level of the signal P to be detected detected by the control module 11 changes, the control module 11 will sample the signal P to be detected for a second logic value (low voltage level) according to the period of the first clock signal CLK1. When the sampling result is the second logic value, a second signal corresponding to the first logic value (high voltage level) will be generated to the logic unit 113. Otherwise, a second signal corresponding to the second logic value (low voltage level) will be generated to the second detection circuit 112. In another embodiment, the signal P to be detected can also be sampled for a preset number of times according to the period of the first clock signal CLK1. When the sampling result is the second logic value, a second signal corresponding to the first logic value (high voltage level) will be generated to the second detection circuit 112.The control module 11 performs an AND operation through the logic unit 113. When the first signal and the second signal are both the same logic value, for example, both are the first logic value (high voltage level), the logic unit 113 generates the output signal corresponding to the first logic value (high voltage level) to the switching device 16 to control whether to output the first power supply voltage V1.

[0034] Specifically, in this embodiment, the control module 11 determines that the signal to be detected P matches the first clock signal CLK1 by using the first detection circuit 111 to detect whether the first logic value exists at the positive edge defined by the first clock signal CLK1, and by using the second detection circuit 112 to detect whether the second logic value exists at the negative edge defined by the first clock signal CLK1. When the first detection circuit 111 detects that the signal to be detected P has the first logic value, the output first signal is the first logic value. When the first detection circuit 111 detects that the signal to be detected P does not have the first logic value, the output first signal is the second logic value. When the second detection circuit 112 detects that the signal to be detected P has the second logic value, the output second signal is the first logic value. When the second detection circuit 112 detects that the signal to be detected P does not have the second logic value, the output second signal is the second logic value.

[0035] In step S15, the control module 11 outputs the output signal with the logic value of the first logic value to the control terminal of the switching device 16, so that the first power supply voltage V1 supplies power to the board 3 to be detected through the third input / output pin 15.

[0036] Referring to Figure 3, in this embodiment, step S15 includes sub-steps S151 to S152.

[0037] In sub-step S151, the first detection circuit 111 outputs the first signal, the second detection circuit 112 outputs the second signal, and both the first signal and the second signal are the first logic value.

[0038] In sub-step S152, the logic unit 113 outputs an output signal with the logic value of the first logic value to the control terminal of the switching device 16. When the output signal is at the first logic value, the first terminal and the second terminal of the switching device 16 are turned on, so that the first power supply voltage V1 supplies power to the board to be detected 3 through the third input / output pin 15.

[0039] Referring to Figure 5, when the target support card is not inserted into the motherboard 1, the signal to be detected P remains at the first logic value (i.e., logic 1). After the first detection circuit 111 and the second detection circuit 112 respectively perform 3 samplings on the signal to be detected P, the first signal becomes the second logic value, the second signal becomes the first logic value, and the output signal becomes the second logic value. When the target support card is inserted into the motherboard 1, the signal to be detected P is almost equal to the second clock signal CLK2. After the first detection circuit 111 and the second detection circuit 112 perform 3 samplings on the target support card, the signal to be detected P becomes almost equal to the second clock signal CLK2. After sampling the signal P to be detected three times, the first signal becomes the first logic value, the second signal becomes the first logic value, the output signal becomes the first logic value, and the first power supply voltage V1 is turned on to supply power to the board 3 to be detected. When the target support card is removed from the motherboard 1, the signal P to be detected returns to the first logic value. After the first detection circuit 111 and the second detection circuit 112 sample the signal P to be detected three times, the first signal becomes the second logic value, the second signal becomes the first logic value, and the output signal returns to the second logic value.

[0040] Next, as shown in step S16, the control module 11 outputs the output signal with the logic value of the second logic value, and the switching device 16 cuts off the first power supply voltage V1 to supply power to the board 3 to be detected.

[0041] Referring to Figure 4, in this embodiment, step S16 includes sub-steps S161 to S162.

[0042] In sub-step S161, the first detection circuit 111 outputs the first signal, the second detection circuit 112 outputs the second signal, and the first signal or the second signal is the second logic value.

[0043] In sub-step S162, the logic unit 113 outputs the output signal with the logic value of the second logic value, and the switching device 16 cuts off the first power supply voltage V1 to supply power to the board 3 to be detected.

[0044] Referring to Figure 6, when the non-target support card is not inserted into the motherboard 1, the signal to be detected P remains at the first logic value (i.e., logic 1). After the first detection circuit 111 and the second detection circuit 112 respectively perform 3 samplings on the signal to be detected P, the first signal becomes the second logic value, the second signal becomes the first logic value, and the output signal becomes the second logic value. When the non-target support card is inserted into the motherboard 1, the signal to be detected P remains at the second logic value (i.e., logic 0). After the first detection circuit 111 and the second detection circuit 112 respectively perform 3 samplings on the signal to be detected P, the first signal becomes the second logic value, the second signal becomes the first logic value, and the output signal becomes the second logic value. After sampling the signal P to be detected three times, the first signal becomes the first logic value, the second signal becomes the second logic value, and the output signal becomes the second logic value. The control module 11 cuts off the first power supply voltage V1 to supply power to the board 3 to be detected. When the target support card is removed from the motherboard 1, the signal P to be detected returns to the first logic value. After the first detection circuit 111 and the second detection circuit 112 respectively sample the signal P to be detected three times, the first signal becomes the second logic value, the second signal becomes the first logic value, and the output signal remains at the second logic value.

[0045] In step S17, the logic unit 113 also outputs the output signal to the warning device 17, and the warning device 17 outputs an abnormal warning notification based on the output signal. The warning device 17 may be a speaker, an LED light, a display, or other type of warning device 17. When the output signal is output to the warning device 17, the voltage level of the output signal is pulled high from the second logic value to the first logic value, and the LED light will be lit to prompt the user to check and confirm.

[0046] It should be understood that steps S11 to S17 and the flowcharts of Figures 2 to 4 in this embodiment are merely illustrative examples of one possible implementation of the board detection method of the present invention. It should be understood that even if the foregoing steps are combined, split, or rearranged, if the resulting process achieves substantially the same effect in a substantially identical manner as the embodiment in this patent specification, it still falls within the implementable state of the board detection method of the present invention. Therefore, steps S11 to S17 and the flowcharts of Figures 2 to 5 in this embodiment are not intended to limit the scope of implementation of the present invention.

[0047] In summary, by determining whether the signal to be detected P matches the first clock signal CLK1, the motherboard 1 controls the first power supply voltage V1 to supply power or not to the card to be detected 3 according to the output signal. Furthermore, if the card to be detected 3 is not the target support card, the warning device 17 outputs an abnormal warning notification according to the output signal to remind the user to insert the wrong card. This determines whether the card to be detected 3 installed on the motherboard 1 is the target support card, preventing the motherboard 1 from continuing to supply power when an incorrect card is inserted, which could cause server system failure or card burnout.

[0048] However, the above description is only an embodiment of the present invention and should not be construed as limiting the scope of the present invention. Any simple equivalent changes and modifications made in accordance with the scope of the patent application and the contents of the patent specification shall still fall within the scope of the patent of the present invention. [Simplified Explanation of the Diagram]

[0049] Other features and effects of the present invention will be clearly presented in the embodiments with reference to the drawings, wherein: FIG1 is a block diagram illustrating, by way of example, a motherboard for performing one embodiment of a board detection method, and a board to be detected connected to the motherboard by a signal; FIG2 is a flowchart illustrating, by way of example, how the board detection method is implemented in this embodiment; and FIG3 and FIG4 are flowcharts illustrating, by way of example, the detailed process of the board detection method being performed in this embodiment; FIG5 is a timing diagram illustrating, by way of example, that a first power supply voltage is turned on when a target support card is inserted in this embodiment; and FIG6 is another timing diagram illustrating, by way of example, that the first power supply voltage is turned off when a non-target support card is inserted in this embodiment.

Claims

1. A board detection method for detecting whether a board to be detected, inserted into a connector on a motherboard, is a target support card, and implemented by a logic device disposed on the motherboard, the logic device including a control module and a clock generation unit, the motherboard further including a switching device and providing a first power supply voltage, and the control module including a first detection circuit, a second detection circuit, and a logic unit; the board detection method includes: (A) the clock generation unit outputting a first clock signal to the control module, and the clock generation unit outputting a second clock signal to a first input / output pin of the motherboard according to the first clock signal; (B) the control module receiving a signal to be detected through a second input / output pin of the motherboard; (C) the control module determining whether the signal to be detected matches the first clock signal, wherein, The system uses a first detection circuit to detect whether a first logic value exists at the positive edge defined by the first clock signal for the signal to be detected, and a second detection circuit to detect whether a second logic value exists at the negative edge defined by the first clock signal for the signal to be detected. When the first detection circuit detects that the signal to be detected has the first logic value, it outputs a first signal equal to the first logic value. When the first detection circuit detects that the signal to be detected does not have the first logic value, it outputs a first signal equal to the second logic value. When the second detection circuit detects that the signal to be detected has the second logic value, it outputs a second signal equal to the first logic value. (A) When the second detection circuit detects that the signal to be detected does not have the second logic value, the output second signal is the second logic value; and (D) After the control module determines that the signal to be detected matches the first clock signal, it determines that the board to be detected is the target support card and outputs an output signal to the switching device, wherein the logic unit receives the first signal output by the first detection circuit and the second signal output by the second detection circuit, and outputs the output signal to the switching device. When the first signal is at the first logic value and the second signal is at the first logic value, the switching device turns on the first power supply voltage to supply power to the board to be detected. The switching device includes a control terminal for receiving the output signal, a first terminal for receiving the first power supply voltage, and a second terminal electrically connected to a third input / output pin. When the first signal is at the first logic value and the second signal is at the first logic value, the first terminal and the second terminal of the switching device are turned on, so that the first power supply voltage supplies power to the board to be detected.

2. The board detection method as described in claim 1, wherein, When the target support card is inserted into the motherboard, the first input / output pin and the second input / output pin are electrically connected.

3. The board detection method as described in claim 1, wherein the motherboard is further equipped with an alarm device, and in step (C), the logic unit also outputs the output signal to the alarm device. When the first detection circuit outputs the first signal at the second logic value, or the second detection circuit outputs the second signal at the second logic value, the switching device cuts off the first power supply voltage to the board to be detected, and the alarm device outputs an abnormal warning notification according to the output signal.

4. The board detection method as described in claim 1 further includes, prior to step (C): (E) the control module determines whether the motherboard and the board to be detected are in a connected state based on the signal to be detected; (F) when the control module determines that the motherboard and the board to be detected are in a connected state, step (C) is executed.

5. The board detection method as described in claim 4, wherein, In step (E), when the control module determines that there is a change in the voltage level of the signal to be detected, it determines that the motherboard and the board to be detected are in a connected state.

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