Method, machine readable medium, system and computer program product for curvilinear and rectilinear routing

Abstract

Some embodiments of the invention provide an integrated circuit (IC) that has a novel non-preferred direction (NPD) wiring architecture. In some embodiments, the IC includes a substrate and multiple wiring layers, which include a first set of one or more wiring layers with no preferred wiring directions, and a second set of one or more wiring layers with preferred wiring directions. In some embodiments, the first set of wiring layers includes the third and fourth wiring layers, while the second set of wiring layers includes the fifth and higher metal layers with successive neighboring layers having different (e.g., alternating) preferred wiring directions. The first set of wiring layers in other embodiments includes the third wiring layer but not the fourth wiring layer, which in these embodiments has a preferred wiring direction.

Claims

1. A layout method for an integrated circuit design comprising at least four wiring layers, the layout method comprising: performing a first non-preferred direction routing operation group to define curved routing through a first wiring layer for a first net group, the first non-preferred direction routing operation group performing a path search through the first wiring layer without crossing any wiring layer above the first wiring layer; and performing a second non-preferred direction routing operation group to define curved routing through a second wiring layer for a second net group, the second non-preferred direction routing operation group performing a path search through the second wiring layer without crossing any wiring layer above the second wiring layer.

2. The layout method as described in claim 1, wherein the first wiring layer and the second wiring layer are a third wiring layer and a fourth wiring layer of the integrated circuit design, the third wiring layer and the fourth wiring layer do not have a preferred wiring orientation because during path search, no wiring orientation in the third wiring layer or the fourth wiring layer is given a higher cost than other wiring orientations.

3. The layout method as described in claim 2, wherein the path search during the first non-preferred direction routing operation group explores paths from the third wiring layer to a first wiring layer or a second wiring layer of the integrated circuit design, but does not explore paths to a fourth wiring layer or higher of the integrated circuit design; and the path search during the second non-preferred direction routing operation group explores paths from the fourth wiring layer to the first wiring layer, the second wiring layer or the third wiring layer, but does not explore paths to a fifth wiring layer or higher.

4. The layout method as described in claim 3, wherein the first wiring layer and the second wiring layer each have a plurality of regions having straight wiring in a preferred direction for a predefined intellectual property circuit block, and the first non-preferred direction wiring operation group and the second non-preferred direction wiring operation group define a plurality of curved wiring segments between the regions of the first wiring layer and the second wiring layer having straight wiring in the preferred direction for the predefined intellectual property circuit block.

5. The layout method as described in claim 1 further includes performing a third preferred direction routing operation group to define a plurality of straight preferred direction routings that traverse along a plurality of routing layers located above the first routing layer and the second routing layer for use in a third network group.

6. The layout method as described in claim 5, wherein the first wiring layer and the second wiring layer are the first wiring layer and the second wiring layer of the integrated circuit design.

7. The layout method as described in claim 5 further includes, after the second non-preferred direction routing operation group but before the third preferred direction routing operation group, performing a fourth non-preferred direction routing operation group to define curved routing through a third routing layer for a fourth mesh group, the fourth non-preferred direction routing operation group performing a search for paths through the third routing layer without traversing any routing layers located above the third routing layer.

8. The layout method as described in claim 5, wherein at least one subgroup of the preferred straight-line routing traverses the first routing layer and the second routing layer.

9. The layout method as described in claim 5, wherein each of the curved routings comprises at least one curved routing segment, and no straight routings have any curved routing segments, wherein the first non-preferred direction routing operation group and the second non-preferred direction routing operation group further define a plurality of straight routings.

10. The layout method as described in claim 5, wherein a preferred routing direction of each preferred routing layer refers to a direction in which at least a threshold percentage of the routing segments of the routing layer are included.

11. The layout method as described in claim 1 further includes determining that the first non-preferred direction routing operation group is completed after determining that the congestion of the first routing layer has reached a threshold, or after determining that no routing can be defined in the first routing layer for any other unrouted net which is a candidate net for routing in the first routing layer.

12. The layout method as described in claim 1, wherein the first wiring layer and the second wiring layer comprise the first patch panel and the second patch panel, and the preferred directional wiring layer comprises a third patch panel and a patch panel located above the third patch panel.

13. A machine-readable medium storing a program that, when implemented by at least one processing unit, implements the method as described in any one of claims 1 to 12.

14. A system for laying out an integrated circuit design, the system comprising means for implementing the method as described in any one of claims 1 to 12.

15. A computer program product comprising a plurality of instructions, wherein when the instructions are executed by a computer, the computer performs the method as described in any one of claims 1 to 12.

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