Memory system

TW202636450APending Publication Date: 2026-09-01KIOXIA CORP
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Patent Information

Application Number
TW115119814
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-11-22
Filing Date
2022-11-25
Publication Date
2026-09-01

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Abstract

According to this embodiment, the memory system includes: non-volatile memory comprising a plurality of memory cells, each capable of storing at least a first bit, a second bit, and a third bit; and a memory controller that controls the non-volatile memory. The non-volatile memory outputs first hardware bit data of the first bit, second hardware bit data of the second bit, third hardware bit data of the third bit, and fourth software bit data associated with the first, second, and third bits to the memory controller. The memory controller uses the first hardware bit data, second hardware bit data, third hardware bit data, and fourth software bit data to perform error correction processing.
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