Memory device, semiconductor device, and method for forming memory device

Abstract

A memory device includes a plurality of memory cells, each of the plurality of memory cells including a resistive element and a transistor connected in series between a first access line and a second access line. The first access line includes at least a first metal track disposed in a first one of a plurality of metallization layers over a substrate, and a second metal track disposed in a second one of the plurality of metallization layers. The second access line includes at least a third metal track disposed in a third one of the plurality of metallization layers, and a fourth metal track disposed in a fourth one of the plurality of metallization layers. The second metallization layer is disposed over the fourth metallization layer, the fourth metallization layer is disposed over the third metallization layer, and the third metallization layer is disposed over the first metallization layer.

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