Semiconductor devices and methods of forming

TW202636804APending Publication Date: 2026-09-01TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information

Application Number
TW114133032
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-07-03
Filing Date
2025-08-29
Publication Date
2026-09-01

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    Figure TWG2TA001074278_003
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Abstract

A middle contact etch stop layer (MCESL) with a multi-layered structure is formed over the interlayer-dielectric layer (ILD) and the gate structure of a semiconductor device, and an interconnect structure is then formed on the MCESL. The MCSEL includes a first dielectric layer (e.g., SiOCN), a second dielectric layer (e.g., SiOC), and a third dielectric layer (e.g., SiO) formed successively over the ILD and the gate structure. A dielectric constant of the first dielectric layer is higher than that of the second dielectric layer and that of the third dielectric layer. The first dielectric layer performs most of etch stopping function of the MCESL. The second dielectric layer helps to reduce the overall dielectric constant of the MCESL, and also functions as a buffer layer to reduce downward oxygen diffusion from the third dielectric layer into the gate structure. The third dielectric layer helps to achieve improved photolithography quality.
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