Method of manufacturing silicon on insulator substrate

TW202636880APending Publication Date: 2026-09-01SK HYNIX INC
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Patent Information

Application Number
TW114141431
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-02-18
Filing Date
2025-10-27
Publication Date
2026-09-01

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Abstract

A method of manufacturing a silicon on insulator (SOI) substrate is provided. A method of forming an SOI substrate includes forming a first wafer structure on an upper surface of a first wafer having a notch and a wafer identification (ID). The first wafer structure includes an etch stopper, a semiconductor layer, a buried insulation layer and a first bonding insulation layer, which are sequentially formed. An edge of the first wafer structure may be trimmed to form a trimmed region. Residual trimming byproducts on the first bonding insulation layer of the first wafer structure may be removed. The first wafer structure may be bonded to the second wafer structure. The semiconductor layer of the first wafer structure may be transferred onto the second wafer structure. A trimmed region may have a width greater than a recess length of the notch, and a depth greater than a depth of the wafer ID.
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