Wafer optical inspection system and inspection method

Abstract

A wafer optical inspection system, including an image capturing device, which consists of a photosensitive element, an LED source and a laser source. The LED source generates a reflection feature at the edge of a batch of wafers, and the laser source generates a profile feature at the edge of the batch of wafers. The photosensitive element captures an image of the wafer batch, along with the reflection feature and the profile feature, to form a side view image of the wafer batch. An image recognition device identifies the number of wafers and their positions in the batch based on the side view image of the wafer batch.

Description

[Technical Field]

[0001] This invention generally relates to a wafer optical inspection device, and more specifically, to a wafer optical inspection device and its inspection method that uses a hybrid light source such as a light-emitting diode (LED) and a laser. [Previous Technology]

[0002] In the semiconductor industry, wafers are typically housed in wafer cassettes within standard mechanical interface boxes (SMIFs, hereinafter referred to as wafer cassettes) or front-opening wafer transport boxes (FOUPs, hereinafter referred to as wafer cassettes). This ensures that the wafers are not damaged, contaminated, or subjected to electrostatic interference during storage and transportation, playing a crucial role in semiconductor manufacturing processes. The wafer cassette has multiple slots, the shape and spacing of which are precisely designed to ensure the wafers are securely placed within them. Each slot typically holds only one wafer. During the manufacturing process, selected wafers are transferred between machines or cavities via robotic arms to reduce human error and improve production efficiency. Due to process automation, the number and position of wafers on the wafer cassette are pre-checked before entering the machine or cavity to prevent issues such as wafer breakage, skipping, and / or misalignment during the manufacturing process caused by incorrect wafer information or abnormal wafer positioning.

[0003] Taking a wet bench as an example, the wafer cassette is first placed at the load / unload port of the machine. At this stage, the machine will first inspect the wafer cassette to determine the number and position of the wafers on its wafer boat, checking for any broken, missing, or abnormally positioned wafers. Only then will the robotic arm move to transfer the wafers. The wet bench typically has multiple process tanks inside. Wafers enter and exit each process tank via robotic arms, often using a batch processing method, where all wafers in the wafer cassette enter the process tank simultaneously for processing. If the robotic arm malfunctions or an abnormal process occurs, it may cause abnormal wafer positions on the wafer boat, such as broken wafers, skipped wafers, and / or misaligned wafers. However, due to wafer transfer methods and space limitations, conventional acid tank machines cannot accommodate detection equipment such as fiber optic sensors (which need to move within the space) within the process tanks. Therefore, it is impossible to detect any abnormalities in the wafer's position on the wafer boat between tanks during the process. Consequently, when wafer breakage, skipping, or oblique insertion occurs in the process tank, the subsequent transfer movements of the robotic arm can easily impact the wafer, causing secondary damage, or even wafer breakage. [Summary of the Invention]

[0004] In view of the problems that are prone to occur in the aforementioned prior art, the present invention proposes a wafer optical inspection device, characterized by using a hybrid light source to generate reflection features and contour features at the edge of the wafer, combined with the captured wafer side image, so that the quantity and position of batch wafers can be detected at fixed points in the process tank area, solving the problem that prior art cannot detect wafer information in the process.

[0005] One aspect of the present invention is to provide a wafer optical inspection apparatus installed in a machine tool having at least one process area for setting a batch of wafers. The wafer optical inspection apparatus includes: an image capturing device comprising a photosensitive element, a light-emitting diode (LED) light source, and a laser light source, wherein the LED light source generates a reflection feature at the edge of the batch of wafers, and the laser light source generates a contour feature at the edge of the batch of wafers; the photosensitive element captures a wafer image, the reflection feature, and the contour feature of the batch of wafers to form a wafer group side image; and an image recognition device that identifies the number and position of the wafers in the batch of wafers through the wafer group side image.

[0006] Another aspect of the present invention is to provide a wafer optical inspection method, comprising: installing a wafer optical inspection device in a machine, the machine having at least one process area for setting a batch of wafers, the wafer optical inspection device comprising: an image capturing device corresponding to one of the process areas and including a photosensitive element, a light-emitting diode light source and a laser light source; and an image recognition device; capturing a side image of a wafer group of the batch of wafers at a fixed point through the image capturing device, wherein the light-emitting diode light source generates a reflection feature at the edge of the batch of wafers, the laser light source generates a contour feature at the edge of the batch of wafers, the photosensitive element captures the image of the batch of wafers, the reflection feature and the contour feature to form the side image of the wafer group; and using the image recognition device to identify batch wafer data of the batch of wafers through the side image of the wafer group, the batch wafer data including the number of wafers and the wafer position of the batch of wafers.

[0007] Such and other objects of the present invention should become more apparent to the reader after reading the detailed description of the preferred embodiments described below with various illustrations and drawings.

Implementation Method

[0008] Exemplary embodiments of the present invention will now be described in detail below, with reference to the accompanying drawings illustrating the described features to enable the reader to understand and achieve the technical effects. The reader will understand that the descriptions herein are by way of illustration only and are not intended to limit the scope of the invention. Various embodiments of the invention and various non-conflicting features thereof can be combined or rearranged in various ways. Modifications, equivalents, or improvements to the invention will be understood by those skilled in the art without departing from the spirit and scope of the invention, and are intended to be included within the scope of the invention.

[0009] Readers should be able to easily understand that the meanings of “on”, “above”, and “above” in this case should be interpreted in a broad sense, such that “on” not only means “directly on” something, but also includes the meaning of being “on” something with an intermediary feature or layer, and that “above” or “above” not only means “on” something, but also includes the meaning of being “on” something without an intermediary feature or layer (i.e., directly on something).

[0010] In addition, spatial terms such as “below,” “under,” “lower,” “above,” and “upper” may be used herein for convenience to describe the relationship between one element or feature and one or more other elements or features, as shown in the accompanying drawings.

[0011] Readers can generally understand terms at least partially from their usage in context. For example, depending at least partially on the context, the term "one or more" as used herein can be used to describe any feature, structure, or characteristic in a singular sense, or it can be used to describe a combination of features, structures, or characteristics in a plural sense. Similarly, depending at least partially on the context, terms such as "a," "an," "the," or "the" can also be understood to convey either a singular or a plural usage. In addition, the term "based on" can be understood not necessarily to convey an exclusive set of factors, but rather to allow for the presence of additional factors that are not necessarily explicitly described, which also depends at least partially on the context.

[0012] Readers will better understand that when words such as "comprising" and / or "containing" are used in this specification, they expressly define the presence of the stated features, areas, wholes, steps, operations, elements and / or components, but do not preclude the possibility of the presence or addition of one or more other features, areas, wholes, steps, operations, elements, components and / or combinations thereof.

[0013] Please now refer to Figure 1, which is an isometric projection schematic diagram of an acid bath bench equipped with the wafer optical inspection equipment of the present invention according to Embodiment 1 of the present invention. This allows the reader to understand the collaborative operation of the wafer optical inspection equipment and the acid bath bench. It should be noted that the wafer optical inspection equipment of the present invention is not limited to use on acid bath benches; any machine or cavity that needs to detect the number and position of wafers in a wafer cassette during the manufacturing process is applicable to the equipment features and method concepts of the present invention.

[0014] As shown in Figure 1, the acid tank machine 100 of the present invention can be a batch-type wafer wet etching equipment commonly used in general semiconductor manufacturing processes. The function of this type of machine is to remove the surface layer of semiconductor materials using chemical liquids. It can support traditional process steps such as pre-film cleaning, etching, post-etching cleaning, and photoresist stripping, which is crucial for the manufacture of integrated circuits. In the prior art, wafer cassettes (such as SMIF or FOUP, not shown) are generally first tested using a detection device to determine the number and position of wafers on their wafer boat, checking for broken wafers, missing wafers, or abnormal positions. After confirmation, the wafer cassette located outside the machine is loaded into the process space inside the machine via the loading port LD for subsequent processes. In this embodiment, the acid tank machine 100 has six process tanks T1 to T6, which are filled with chemical liquids for cleaning or etching. Different chemical liquids have different effects on different materials and process technologies.

[0015] For example, the process tank T1 may contain a sulfuric acid / hydrogen peroxide mixture (SPM, commonly known as Piranha solution), which is used to clean organic contaminants such as grease and photoresist residues from the wafer surface. The process tank T2 may contain heated deionized water (HQDR) at a temperature between 60 and 80°C, which is used to rinse away large oxide particles generated after the aforementioned SPM process. The process tank T3 may contain an ammonium peroxide mixture (APM, also known as standard cleaning solution one, SC-1), which is used to clean the particles remaining on the wafer surface after the aforementioned process. The process tank T5 may perform the final RCA wet cleaning step, which uses the aforementioned standard cleaning solution SC-1 and standard cleaning solution two SC-2 (such as hydrochloric acid / hydrogen peroxide mixture, HPM) successively to thoroughly remove metal ions and contaminants from the wafer surface. The cleaned wafers are then placed back into the wafer boat and loaded out of the machine via the ULD (Unload Port).

[0016] Referring again to Figure 1. The transfer and transport of wafers between the aforementioned loading port LD, unloading port ULD, and each process tank T1~T6 is performed by wafer carrier devices G1~G4 (such as acid tank wafer lifting arms) and robotic arms R installed inside the machine. For example, in an embodiment, wafer carrier devices G1~G4 are respectively responsible for feeding wafers into process tanks T1~T6 for cleaning and removal, and then transferring them to the unloading port ULD via a track to be unloaded from the machine. In an embodiment, the transfer of wafers between different wafer carrier devices G1~G4 can be achieved by a robotic arm R installed on one side of the machine. A typical acid tank machine 100 adopts batch operation, which can simultaneously process two lots of wafers, as shown in the wafer groups (also referred to as batch wafers) L1, L2 in the figure. Each wafer group L1, L2 can have up to 50 wafers. As mentioned earlier, conventional technology only installs detection devices at the loading port LD and unloading port ULD before entering the acid bath to determine the number and position of wafers on the wafer boat before and after the wet process. It cannot determine the wafer status within the process tanks T1-T6 during the process. Therefore, if the wafer carriers G1-G4 or the robotic arm R malfunction during the process, or if an abnormality occurs in the acid bath process leading to an abnormal wafer status, it may cause abnormal positioning of the wafers on the wafer carriers G1-G4, the robotic arm R, or within the process tanks T1-T6, resulting in wafer skipping, wafer sticking, or misaligned insertion, or even wafer breakage. These situations cannot be detected in real time during the process, thus causing more serious secondary damage during wafer transfer.

[0017] To solve the aforementioned conventional problems, referring again to Figure 1, in this embodiment of the invention, each wafer carrier G1~G4 in the acid tank machine 100 is configured with a corresponding image capture device D1~D4. The image capture devices D1~D4 can be located above the process tanks T1~T6, and can capture images of the wafer assemblies on the corresponding wafer carrier G1~G4. More specifically, as shown in Figure 1, after the wafer assembly L1 completes the cleaning process in the process tank T4, it will be lifted above the process tank T4 via the corresponding wafer carrier G3, and the wafer assembly L1 will be transferred from the wafer carrier G3 to the robotic arm R at this point. This wafer transfer location can serve as the detection area for the wafer image of this invention. It captures the image of the wafer group L1 on the wafer carrier device G3 through the corresponding image capture device D3 (located above the adjacent process tank T3) to confirm whether the mechanical transfer position is correct and to detect the position and quantity of wafers in the wafer group L1. It can then determine whether there are wafer breakage, missing wafers, oblique insertion, skipping wafers, and / or sticking wafers. When the detection result is abnormal compared with the reference data, the system can automatically issue a process stop command to the equipment to avoid further damage caused by subsequent transfer actions or processes.

[0018] Please now refer to Figure 2, which is a schematic diagram of the system architecture of a wafer optical inspection device according to an embodiment of the present invention. This allows the reader to understand the cooperative relationship between the components of the wafer optical inspection device, the acid tank machine, and the control system of the present invention. As shown in Figure 2, each image capture device of the present invention (taking D1 as an example) consists of a photosensitive element 10, a light-emitting diode (LED) light source 20, and a laser light source 30. The photosensitive element 10 can be a photocoupled device (CCD) with a lens, which can capture a side image (also called a wafer edge image) of the wafer assembly L1 at a 45-degree angle. The LED light source 20 can be an LED strip, which can form reflective features on the surface of the wafer edge. The laser light source 30 can be a red or blue laser, which can form contour features on the surface of the wafer edge. The aforementioned reflective and contour features will subsequently be used by the system to determine the position and number of wafers. In this embodiment, the image capture device D1 is connected to a programmable logic controller (PLC) 40 in the wafer optical inspection equipment. The PLC 40 can adjust the system's operating state according to changes in external conditions, control mechanical equipment and industrial processes, and coordinate the collaborative work of multiple devices / devices in complex automated systems. For example, in this embodiment, the PLC 40 can receive wafer images, reflection features, and contour features captured by the image capture device D1, and transmit them to the connected image recognition device 50 for further processing. Furthermore, the PLC 40 can control related equipment / devices in the process according to a program, such as the image capture device D1, the wafer carrier G of the connected acid tank machine, and the robotic arm R, as shown in the control diagram.

[0019] Referring again to Figure 2. The image data received by the aforementioned programmable logic control module 40 will be processed and identified by the image recognition device 50. In this embodiment, the image recognition device 50 may include a control host 50-1, a recognition software algorithm 50-2, and a storage device 50-3. The control host 50-1 can perform pre-processing on the received data, including image decoding, conversion, and enhancement. For example, according to practical needs, the image can be denoised, contrast adjusted, and edge detected to improve the accuracy of subsequent image recognition. The recognition software algorithm 50-2 can analyze the image content based on machine learning technology to identify specific targets or patterns, such as the position and number of wafers in the wafer set L1 under test. The storage device 50-3 can store or back up the received image data, processed image data, recognition results, and event records for querying and management. On the other hand, the image recognition device 50 can also connect to the Enterprise Application Platform (EAP) and Programmable Logic Controller (PLC) modules at the machine end. The EAP integrates data from different systems and devices (such as PLC modules, sensors, and machinery), providing functions such as alarms, fault diagnosis, and production status monitoring, and offering a unified data management platform. The PLC module acts as the field-level control device, responsible for specific equipment control and real-time operation during the automation process. The EAP and PLC modules can work together in the automation system to achieve more efficient process control and management.

[0020] Please now refer to Figure 3, which is a schematic diagram of an image capture model 60 and surrounding related devices according to an embodiment of the present invention. In this embodiment of the present invention, the wafer inspection operation system captures images during the mechanical movement of the wafer carrier devices G1~G4 and the robotic arm R, etc., of the automated control devices. Corresponding image capture devices D1~D4 are set according to the conveying trajectory of the mechanism. The conveying trajectory of the wafer on each wafer carrier device G1~G4 constructs an image capture model 60, which is used to control the operation of the image capture devices D1~D4. As shown in Figure 3, the image capture model 60 may include individual control signals for the wafer carrier devices G1~G4 and the robotic arm R, where each control signal includes two directional phases: "0" and "1". For example, wafer carrier devices G1 and G2 each have a corresponding control signal, where the "1" phase represents the motor moving upwards (the wafer lifting arm rises), and the "0" phase represents the motor moving downwards (the wafer lifting arm descends). The wafer carriers G3 and G4 each have two corresponding control signals: U / D and L / R. In the U / D control signal, a "1" phase represents the motor moving upwards, and a "0" phase represents the motor moving downwards. In the L / R control signal, a "1" phase represents the motor moving left along the track, and a "0" phase represents the motor moving right along the track. These control signals can be generated by the programmable logic control module 40 to control the movement of the wafer carriers G1-G4 and the robotic arm R. Furthermore, during the aforementioned mechanical movement, the programmable logic control module 40 can also control the image capture devices D1-D4 to capture images based on the control signals from the wafer carriers G1-G4 and the robotic arm R, thus achieving the effect of inspecting the state of the wafers located in the process tank during the manufacturing process. For example, taking the wafer carrier device G3 in Figure 1 as an example, its control signals U / D and L / R are both in the "1" phase, and the robotic arm R signal is set to the "1" phase relative to the wafer carrier device G3. At this time, the wafer assembly will be located directly above the process tank T4. The programmable logic control module 40 can send control signal commands to the corresponding image capture device D3 to capture images for wafer position analysis.

[0021] Please now refer to Figures 4 and 5 simultaneously, which are schematic diagrams of the image capture device D3 and the wafer assembly L1 under test from the front and side views of the wafer according to Embodiment 1 of the present invention. In the embodiment, the photosensitive element 10, LED light source 20, and laser light source 30 in the image capture device D3 of the present invention are aligned with the side of the wafer assembly L1 under test at an oblique angle, preferably 45 degrees, to capture a side image of the wafer assembly L1, wherein the orientation of the wafer in the side image is preferably vertical. At this time, the wafer assembly L1 under test can be located in the image detection area preset by the present invention, as shown in Figure 1 above the process tank T4 after the wafer carrier device G3 lifts the wafer assembly L1, that is, the wafer assembly L1 is transferred to the position of the robotic arm R. The range DOF in the figure is the imaging depth area of ​​the photosensitive element 10. Within this range DOF, the photosensitive element 10 can obtain a clear side image of the wafer assembly to reduce the influence of background noise. In addition to the side image of the wafer assembly, the LED light source 20 and laser light source 30 of the image capture device D3 can respectively form a reflection feature RF and a contour feature PF at the edge of the wafer assembly L1. The aforementioned side image of the wafer assembly, the reflection feature RF, and the contour feature PF together constitute the wafer edge image of the present invention, which can be used by the system to determine the position and number of wafers in the wafer assembly L1, and can also be used to determine the position of the transmission mechanism (such as the wafer carrier devices G1~G4 and the robotic arm R).

[0022] Please now refer to Figure 6, which is a schematic diagram of using an LED light source 20 to generate a reflective feature RF at the edge of wafer group L1 according to an embodiment of the present invention. In the embodiment, the LED light source 20, such as an LED light strip, can provide a uniformly distributed and diffused light source, thus forming a reflective feature RF at the side edge of the wafer. This reflective feature RF is due to the high reflectivity of the wafer material. When the LED light source 20 is used to directly illuminate the side of wafer group L1 at an oblique angle, the smooth wafer surface can reflect the incident light IL to a great extent, thus generating regularly arranged reflective features RF in the imaging depth area. Basically, each wafer in wafer group L1 (such as W1~W4) can generate a reflective feature RF, thereby determining whether there is a wafer in the corresponding wafer slot. It should be noted that in this process, the LED light source 20 does not need to move on the side of wafer group L1 to sense, as conventional fiber optic sensors do; it only needs to be fixed above the process slot, so there are no spatial limitations or requirements.

[0023] Please now refer to Figure 7, which is an enlarged schematic diagram and actual image of several types of reflective features RF according to embodiments of the present invention. In practice, the wafer reflective features RF captured by image capture devices D1 to D4 will exhibit different forms due to the wafer's position or the image capture environment. In the figure, the x-axis represents the arrangement direction of the wafer group, and the y-axis represents the side direction (vertical direction) of the wafer. In the embodiment, taking the left figure as an example, the reflective feature RF of a single bright spot is the standard wafer reflective type, indicating that the corresponding wafer is located in the correct wafer position and there is no abnormality. The wafer position referred to here can be the slot of the wafer carrier device where the wafer is located or the slot of the wafer boat.

[0024] The reflection feature RF shown in the middle figure has multiple bright spots that are not adjacent in the y-axis direction. This can also be determined that the corresponding wafer is in the correct wafer position and there is no abnormality. Multiple bright spots may be caused by wafer positioning notches or other factors such as environmental influences on image capture, and do not represent an abnormality in the state of the wafer itself. The reflection feature RF shown in the right figure has two bright spots that are not adjacent in the x-axis direction. This can be determined that there are two wafers in the corresponding wafer slot at the same time, which may be caused by wafer skipping or sticking in the vicinity. The discrimination information based on the reflection feature RF can be combined with other detection features introduced in subsequent embodiments for further detailed judgment.

[0025] Please now refer to Figure 8, which is a schematic diagram of the generation of contour feature PF at the edge of wafer group L1 using a laser light source 30 according to an embodiment of the present invention. In the embodiment, the laser light source 30, such as a red or blue laser, can actively project a directional light source and leave diffuse patterns in the target area, thereby generating contour feature PF at the edge of the wafer. As can be seen from the figure, unlike the reflection feature RF caused by the aforementioned material properties, a raised contour is generated at the edge of each wafer under the projection of the laser. Then, the diffuse pattern can be located by the photosensitive element 10, which calculates the height and position of the wafer edge using the laser triangulation principle, thereby determining whether there is a wafer in an individual wafer slot. It should be noted that in this process, the laser light source 30 does not need to move to the side of the wafer group L1 to sense, as conventional fiber optic sensors do; it only needs to be fixedly set above the process slot, so there are no spatial limitations or requirements. In the present invention, the combination of the above-mentioned contour feature PF and reflection feature RF can improve the accuracy of wafer detection.

[0026] Please now refer to Figure 9, which is a schematic diagram of the spacing between wafers before correction and the side image of the wafer group in wafer inspection according to an embodiment of the present invention. In this embodiment of the present invention, the photosensitive element 10 can capture the side image 200 of the wafer group in the target area at a fixed point. The side image 200 of the wafer group can include multiple vertically arranged wafer images 12 and their reflection features RF and contour features PF. The algorithm can establish the region of interest (ROI) corresponding to each wafer image 12 based on the wafer image 12, the reflection feature RF and the contour feature PF. Since the photosensitive element 10 is preset to capture the image at the center point of the wafer group L1 (taking the position of the 12th or 13th wafer in a 25-wafer group as an example), the relative position of the wafers on the outside of the wafer group L1 and the corresponding region of interest (ROI) will have a slight deviation. As shown in the figure above, the horizontal axis represents the wafer number and the vertical axis represents the spacing between wafers. As shown in the figure, the wafer spacing is largest near the center of the wafer group, and decreases as you move outwards from the wafer group. This is because the wafers further out of the wafer group are farther from the photosensitive element 10. This difference in wafer spacing will cause deviations in the subsequent two-dimensional image generated based on the aforementioned spacing data. Therefore, the invention performs a one-vector deviation correction on the measured spacing data to obtain accurate actual wafer spacing data.

[0027] Please refer to Figure 10, which is a schematic diagram of the corrected wafer spacing and the resulting two-dimensional wafer group image 300 in wafer inspection according to an embodiment of the present invention. As can be seen from the figure, after vector correction, the wafer group side image 200 yields relatively consistent and uniform wafer spacing data, without a trend of decreasing spacing towards the outer edges. After obtaining the corrected wafer spacing data, a two-dimensional wafer group image 300 can be generated based on this data, as shown in the figure below. This image includes multiple wafer images W and corresponding slot grids S, for template comparison by the system in subsequent analysis steps.

[0028] Please now refer to Figure 11, which is a schematic diagram 500 of a wafer confirmation template 400 and a template matching analysis in wafer inspection according to an embodiment of the present invention. In the inspection of the present invention, the system provides a wafer confirmation template 400 for application to the aforementioned two-dimensional image 300 of the wafer group. The wafer confirmation template 400 may contain slot numbers, such as A1~A25, B1~B25, in the conventional batch processing settings of the acid tank machine. A and B can respectively represent two boxes of wafers contained in wafer group L1, and 1~25 represent which slot. It can be seen that the wafers in wafer group L1 can be interactively set in the batch wafer slots. Each slot in the wafer confirmation template 400 has two position confirmation boxes 400a and 400b, which are respectively set near the bottom and top of each slot to confirm whether there is an abnormality in the position of the wafer in the slot. On the other hand, the template matching analysis diagram 500 below is an overlap diagram of the aforementioned wafer group 2D image 300 and wafer confirmation template 400. As can be seen from the diagram, ideally, the slot grid S of the wafer group 2D image 300 will completely overlap with the slot grid S of the wafer confirmation template 400. Furthermore, the wafer image W in the overlapped wafer group 2D image 300 will be located in the corresponding slot grid S in the wafer confirmation template 400. Thus, under normal circumstances, the wafer image W will also overlap with the two position confirmation boxes 400a and 400b in the corresponding slot grid S in the wafer confirmation template 400. In this embodiment of the invention, whether the wafer image W overlaps with the corresponding position confirmation boxes 400a and 400b can determine whether a wafer exists in the slot grid S and whether the wafer's position is abnormal.

[0029] Please now refer to Figure 12, which is a schematic diagram 500 of the wafer group side image 200 and the corresponding template matching analysis according to Embodiment 1 of the present invention. In this embodiment, the wafer is in a normal position. In this state, each wafer image W in the template matching analysis schematic diagram 500 will overlap with the position confirmation boxes 400a and 400b in the corresponding slot grid S. When the algorithm confirms that the position confirmation boxes 400a and 400b in the slot grid S overlap with the wafer image W, it is determined that the position of the corresponding wafer is correct. If any position confirmation box 400a or 400b in the slot grid S does not overlap with the wafer image W, it is determined that the position of the corresponding wafer is abnormal.

[0030] Please now refer to Figure 13, which is a schematic diagram 500 of wafer group side image 200 and corresponding template matching analysis according to an embodiment of the present invention. This embodiment is one type of wafer position anomaly. As can be seen from the figure, there is no wafer in a certain slot S in the wafer group side image 200, which may be caused by wafer breakage or missing wafers during the process. In this case, since there is no wafer image W in the corresponding slot S in the template matching analysis schematic diagram 500, the position confirmation boxes 400a and 400b in the slot S will not overlap with the wafer image W. The algorithm can therefore determine that there is an abnormal situation of wafer breakage or missing wafers in the slot.

[0031] Please now refer to Figure 14, which is a schematic diagram 500 of wafer group side image 200 and corresponding template matching analysis according to an embodiment of the present invention. This embodiment is one type of wafer position anomaly. As can be seen from the figure, the wafer in a certain slot S of the wafer group side image 200 is obliquely inserted. Because the wafer image W is skewed to one side, the upper position confirmation box 400a of the corresponding slot S in the template matching analysis schematic diagram 500 will not overlap with the wafer image W, but the lower position confirmation box 400b will overlap with the wafer image W. The algorithm can therefore determine that the wafer in that slot has an oblique insertion anomaly.

[0032] Please now refer to Figure 15, which is a schematic diagram 500 of wafer group side image 200 and corresponding template matching analysis according to an embodiment of the present invention. This embodiment is one type of wafer position anomaly. As can be seen from the figure, a wafer in a certain slot S in the wafer group side image 200 has skipped and is located in an adjacent slot. Since there is no wafer image W, the position confirmation boxes 400a and 400b of the corresponding slot S in the template matching analysis schematic diagram 500 will not overlap with the wafer image W. Furthermore, since there are two wafer images W in the adjacent slot S at the same time, its position confirmation boxes 400a and 400b will also be judged as abnormal by the algorithm, and the system can therefore determine that the wafer in that slot has skipped anomaly.

[0033] Please now refer to Figure 16, which is a flowchart of a wafer optical inspection method according to an embodiment of the present invention. It should be noted that in the present invention, this wafer optical inspection method can be performed each time a batch of wafers enters the process tank or batch operation space / area of ​​the machine, such as at the loading / unloading port, the wafer transfer / cleaning position above the process tank, etc.

[0034] First, in step S1, a side image of a wafer assembly is captured (as shown in 200 of Figure 9). This side image of the wafer assembly can be obtained by point-capturing a batch of wafers (as shown in L1 of Figure 5) using the image capture device of the present invention (as shown in D3 of Figure 5). In an embodiment, the side image of the wafer assembly includes a reflection feature RF and a contour feature PF (as shown in Figure 5). More specifically, the reflection feature RF and the contour feature PF in the present invention can be generated by an LED light source (as shown in 20 of Figure 5) and a laser light source (as shown in 30 of Figure 5) in the image capture device, respectively, and captured together by a photosensitive element (as shown in 10 of Figure 5).

[0035] After capturing the wafer assembly side image, in step S2, image preprocessing is performed on the region of interest (ROI) of the wafer assembly side image. The ROI can be preset by the system or algorithm (e.g., ROI in Figure 9), which is the part and area of ​​the captured wafer assembly side image that will be analyzed and processed by the system. This image preprocessing can be performed by the control host in the image recognition device (e.g., 50-1 in Figure 2). This image preprocessing can include decoding, conversion, and enhancement of the wafer assembly side image in the ROI, such as denoising, contrast adjustment, and edge detection according to practical needs, to improve the accuracy of subsequent image recognition.

[0036] After image preprocessing is completed, step S3 proceeds to perform grayscale feature analysis on the processed wafer group side image. Grayscale feature analysis mainly describes and identifies the content in the image through different statistical and geometric features of the grayscale image. In this embodiment, it can be performed by the recognition software algorithm in the image recognition device (such as 50-2 in Figure 2). Grayscale feature analysis may include histogram analysis, texture feature analysis, edge feature analysis, formation feature analysis, etc. Through grayscale feature analysis, the system can obtain the side shape information of each wafer in the wafer group side image for subsequent correction and judgment actions.

[0037] After the grayscale feature analysis is completed, in step S4, a vector deviation correction is performed to simulate the wafer position. As described in the embodiment of Figure 9, since the photosensitive element is aligned with the center point of the wafer group to capture the image, the relative position of the wafers on the outer side of the wafer group and the corresponding area of ​​interest will have a slight deviation. Therefore, a vector deviation correction is required to obtain more uniform wafer spacing data, and then generate a two-dimensional image of the wafer group (such as 300 in Figure 10) based on this data. This vector deviation correction can also be performed by the recognition software algorithm in the image recognition device (such as 50-2 in Figure 2).

[0038] After vector deviation correction and two-dimensional image processing are completed, in step S5, a wafer confirmation template is applied to the two-dimensional image. The wafer confirmation template, as shown in 400 of Figure 11, includes the preset slot numbers of the batch wafers (e.g., A1~A25, B1~B25) and two position confirmation boxes 400a and 400b, etc., which are the information required for analysis. The wafer confirmation template can be provided to the image recognition device by the enterprise application platform (e.g., EAP in Figure 2) at the machine end for subsequent matching processing.

[0039] After applying the wafer confirmation template, the template matching data analysis is performed in step S6. This template matching data analysis can be performed by the recognition software algorithm in the image recognition device (such as 50-2 in Figure 2), as shown in the template matching analysis schematic diagram 500 in Figures 11 to 15. The wafer confirmation template provided in step S5 will be applied to the wafer group two-dimensional image 300 obtained in step 4. In this way, the wafer image W in the wafer group two-dimensional image 300 will be located in the corresponding slot S in the wafer confirmation template 400, so that the algorithm can determine whether there is a wafer in the slot and whether the position of the corresponding wafer is abnormal based on whether the wafer image W overlaps with the two position confirmation boxes 400a and 400b. The various wafer states are detailed in the embodiments in Figures 12 to 15, and will not be described in detail here. After analyzing the data matched by this template, the number of wafers in this batch and the detailed wafer location can be obtained, which can be called batch wafer data, and can be temporarily stored in the storage device of the image recognition device (such as 50-3 in Figure 2).

[0040] After template matching data analysis, in step S7, the batch wafer data obtained in step S6, such as the number of wafers in the batch and their detailed wafer positions, is output. This data can be output by the image recognition device (such as 50 in Figure 2) to the enterprise application platform (such as EAP in Figure 2) at the machine end for comparison with the reference data.

[0041] After outputting the batch wafer data, in step S8, the output batch wafer data is compared with reference data to output the final identification result. In this embodiment, the reference data may be the batch wafer data of the batch wafer in the previous batch processing / process, including the number of wafers in the batch after the previous batch processing and their detailed wafer positions. It may be provided by the enterprise application platform (such as EAP in Figure 2) at the machine end, and the platform will perform the comparison. When the above data comparison is abnormal, such as the wafers in a certain slot do not match, the system will automatically issue a command to the machine to stop the process. For example, when the enterprise application platform (such as EAP in Figure 2) finds that the data comparison does not match, it will issue a command to the programmable logic control module (such as PLC in Figure 2) of the machine in real time, so that the machine will issue an alarm and interrupt the process, and at the same time, it can perform fault diagnosis based on the received data.

[0042] Please now refer to Figure 17, which is a functional block diagram of the wafer optical inspection system and the machine tool according to Embodiment 1 of the present invention. The reader can understand the interactive relationship between the wafer optical inspection system and the machine tool operation from this figure.

[0043] As shown in Figure 17, in terms of the process equipment, a batch of wafers in production is first transferred and loaded into the process slot area (Action A1). For example, as shown in Figure 1, batch wafer L1 is loaded into the process space inside the equipment from the loading port LD. In terms of the wafer optical inspection system, the system first performs a labeling action on the loaded batch wafers (Action A2). For example, batch wafer L1 is labeled with virtual numbers L101~L150 for process slot area trajectory tracking. After the wafer labeling is completed, the reference data corresponding to the batch wafers (such as the reference data in step 8 of Figure 16) is also written to the system. For example, the batch wafer data obtained after the previous process of batch wafer L1 is stored from the EAP system, including the number of wafers and the wafer position, for subsequent comparison (Action A3). In terms of the process equipment, the loaded batch wafers are transferred to the wafer loading device of the process slot of the next batch process by a robotic arm (Action A4). For example, as shown in Figure 1, the robotic arm R transfers a batch of wafers L1 from the process tank T2 to the wafer loading device G3 above the process tank T3. At this time, the wafer optical inspection system captures an image of the batch of wafers (Action A5), capturing a side image of the wafer group as described in the embodiment in Figure 5, and performing algorithm recognition and analysis after image capture (Action A6), applying a wafer confirmation template and analyzing template matching data as described in steps S5-S7 of Figure 16 to obtain the current number of wafers in the batch and their detailed wafer positions. Then, the obtained batch wafer data is compared with the written reference data (Action A7). If the data match, it means that the batch of wafers is in a normal state and can be archived and the process can continue (Action A8). If the data does not match, it means that the batch of wafers is in an abnormal state, and the system will start process / machine abnormality control and command the machine to stop transmission and subsequent processes (Action A9). The system can also automatically send abnormal messages or alarms to the mobile phones of relevant engineers (Action A10) to inform the engineers to carry out subsequent wafer abnormality troubleshooting (Action A11).

[0044] Refer to Figure 17 again. If the data comparison in Action A8 matches, the batch of wafers can be loaded into the process tank by the wafer loading device for wafer cleaning (Action A12). For example, as shown in Figure 1, the wafer loading device G3 loads the batch of wafers L1 downwards into the process tank T3 for cleaning. After the cleaning is completed, the batch of wafers can be loaded out by the wafer loading device and transferred to the robotic arm (Action A13). For example, as shown in Figure 1, the wafer loading device G3 loads the batch of wafers L1 upwards from the process tank T3 and transfers it to the robotic arm R. At this time, similar to Actions A5-A6, the wafer optical inspection system will perform image capture (Action A14) and algorithm identification analysis (Action A15) on the batch of wafers that have completed the cleaning process, and compare the batch wafer data with the reference data again (Action A7). As can be seen from the above process, in this embodiment of the invention, a batch of wafers undergoes a detection operation before and after the process to ensure that no abnormalities occur during the process and / or mechanical transfer. The batch of wafers that have completed the current process can be transferred to the next process tank via a robotic arm (Action A16). For example, as shown in Figure 1, the robotic arm R transfers the batch of wafers L1 that have completed the relevant process in process tank T3 to process tank T4. Subsequent actions will be as described in Actions A4, A12, and A13, and will not be elaborated further here. Finally, the batch of wafers that have completed all tank processes can be transferred out of the process tank area (Action A17). For example, as shown in Figure 1, batch wafers L1 and L2 are loaded from the loading port ULD of the machine, thus completing the batch process related to that machine. The above description is only a preferred embodiment of the present invention. All equivalent variations and modifications made within the scope of the claims of this invention should be considered within the scope of this invention. [Simplified Explanation of the Diagram]

[0045] This specification includes accompanying drawings, which form part of this specification, to provide the reader with a further understanding of the embodiments of the present invention. These drawings depict some embodiments of the present invention and, together with the description herein, illustrate its principles. In these figures: Figure 1 is an isometric projection schematic diagram of an acid tank machine equipped with the wafer optical inspection equipment of the present invention according to Embodiment 1 of the present invention; Figure 2 is a system architecture schematic diagram of the wafer optical inspection equipment according to an embodiment of the present invention; Figure 3 is a schematic diagram of an image capture model and surrounding related devices according to an embodiment of the present invention; Figures 4 and 5 are schematic diagrams of an image capture device and a wafer assembly under test from the front and side views of the wafer according to an embodiment of the present invention; Figure 6 is a schematic diagram of using an LED light source to generate reflection features on the side edge of the wafer assembly according to an embodiment of the present invention; Figure 7 is an enlarged schematic diagram and real image of several types of reflection features according to an embodiment of the present invention; Figure 8 is a schematic diagram of using a laser light source to generate contour features on the edge of the wafer assembly according to an embodiment of the present invention; Figure 9 is a schematic diagram of the spacing between wafers before correction and the side image of the wafer assembly during wafer inspection according to an embodiment of the present invention; Figure 10 is a schematic diagram of the spacing between wafers after correction and the resulting two-dimensional image of the wafer assembly during wafer inspection according to an embodiment of the present invention; Figure 11 is a schematic diagram of a wafer confirmation template and a template matching analysis during wafer inspection according to an embodiment of the present invention. Figure 12 is a schematic diagram of matching analysis between a side image of a wafer assembly and a corresponding template according to an embodiment of the present invention; Figure 13 is a schematic diagram of matching analysis between a side image of a wafer assembly and a corresponding template according to another embodiment of the present invention; Figure 14 is a schematic diagram of matching analysis between a side image of a wafer assembly and a corresponding template according to yet another embodiment of the present invention; Figure 15 is a schematic diagram of matching analysis between a side image of a wafer assembly and a corresponding template according to yet another embodiment of the present invention; Figure 16 is a flowchart of a wafer optical inspection method according to an embodiment of the present invention; and Figure 17 is a functional block diagram of a wafer optical inspection system and equipment according to an embodiment of the present invention. It should be noted that all illustrations in this specification are for illustrative purposes. For clarity and convenience of illustration, the dimensions and proportions of the components in the illustrations may be exaggerated or reduced. Generally, the same reference symbols in the figures are used to indicate corresponding or similar element features in modified or different embodiments.

Claims

1. A wafer optical inspection apparatus, installed in a machine tool having at least one process area for setting a batch of wafers, the wafer optical inspection apparatus comprising: an image capturing device including a photosensitive element, a light-emitting diode (LED) light source, and a laser light source, wherein the LED light source generates a reflective feature at the edge of the batch of wafers, and the laser light source generates a contour feature at the edge of the batch of wafers; the photosensitive element captures a wafer image, the reflective feature, and the contour feature of the batch of wafers to form a wafer group side image; and an image recognition device that generates a wafer group two-dimensional image through the wafer group side image, and applies a wafer confirmation template to the wafer group two-dimensional image to identify the number and position of the wafers in the batch.

2. The wafer optical inspection equipment as described in claim 1, wherein the machine is an acid bath machine and the process area is a process tank, the acid bath machine has at least one wafer carrier to transfer the batch of wafers to each of the process tanks, and each wafer carrier is equipped with a corresponding image capture device.

3. The wafer optical inspection apparatus as described in claim 1, wherein the image capturing device captures a side image of the wafer group of the batch of wafers at an oblique angle.

4. The wafer optical inspection device as described in claim 1, wherein the image recognition device has a recognition software algorithm and identifies the number of wafers and the wafer position of the batch of wafers through the recognition software algorithm.

5. The wafer optical inspection equipment as described in claim 2, wherein the acid tank machine has a robotic arm that transfers the batch of wafers between each of the process tanks, and the robotic arm and the wafer carrier transfer the batch of wafers at a wafer transfer position above the process tank, and the image capture device captures the wafer image of the batch of wafers when the wafer carrier is located at the wafer transfer position.

6. The wafer optical inspection equipment as described in claim 5, wherein the wafer position identified by the image recognition device is the slot of the wafer carrier in which the batch of wafers is located.

7. The wafer optical inspection equipment as described in claim 1 further includes a programmable logic control module to control the collaborative operation and data transmission between the image capture device and the image recognition device.

8. A wafer optical inspection method, comprising: installing a wafer optical inspection device in a machine, the machine having at least one process area for setting a batch of wafers, the wafer optical inspection device comprising: an image capture device corresponding to one of the process areas and including a photosensitive element, a light-emitting diode (LED) light source, and a laser light source; and an image recognition device; capturing a side image of a wafer group of the batch of wafers at a fixed point using the image capture device, and generating a two-dimensional image of the wafer group using the side image of the wafer group using the image recognition device, wherein the LED light source generates a reflection feature at the edge of the batch of wafers, the laser light source generates a contour feature at the edge of the batch of wafers, the photosensitive element captures the image of the batch of wafers, the reflection feature, and the contour feature to form the side image of the wafer group; and applying a wafer confirmation template to the two-dimensional image of the wafer group using the image recognition device to identify batch wafer data of the batch of wafers, the batch wafer data including the number of wafers and the wafer position of the batch of wafers.

9. The wafer optical inspection method as described in claim 8 further includes performing an image preprocessing before the image recognition device identifies the wafer, the image preprocessing including decoding, converting, enhancing, denoising, adjusting contrast, or detecting edges on the side image of the wafer assembly in the region of interest.

10. The wafer optical inspection method as described in claim 8, wherein the step of the image recognition device in recognizing the batch of wafer data includes performing a one-vector deviation correction operation on the side image of the wafer group to obtain relatively uniform wafer spacing data, and generating a two-dimensional image of the wafer group based on the wafer spacing data, wherein the two-dimensional image of the wafer group includes multiple wafer images.

11. The wafer optical inspection method as described in claim 10, wherein the step of the image recognition device identifying the batch of wafer data further includes applying the wafer confirmation template onto the two-dimensional image of the wafer group to form a template matching data, the wafer confirmation template including a plurality of wafer slots, each wafer slot including a slot number and a position confirmation frame near the bottom and top of the slot, and confirming whether the wafer position is abnormal based on whether the wafer image in the two-dimensional image of the wafer group in the template matching data overlaps with the position confirmation frame.

12. The wafer optical inspection method as described in claim 11, wherein the image recognition device identifies the current batch wafer data of the batch wafers through the template matching data.

13. The wafer optical inspection method as described in claim 8 further includes comparing the batch of wafer data with a reference data to obtain an identification result, wherein the reference data comes from the dispatch information of the automated system, and each batch of data is an independent sample, including the batch of wafer data when the batch of wafers completed the previous process or the previous transfer action.

14. The wafer optical inspection method as described in claim 8, wherein the machine is an acid tank machine and the process area is a process tank, the acid tank machine has a robotic arm that transfers the batch of wafers between each of the process tanks, and a wafer carrier that transfers the batch of wafers to the process tank, the robotic arm and the wafer carrier that transfer the batch of wafers at a wafer transfer position above the process tank, and the image capture device that captures a side image of the wafer group of the batch of wafers when the wafer carrier is located at the wafer transfer position.

15. The wafer optical inspection method as described in claim 14, wherein the wafer position in the batch of wafer data is the slot of the wafer carrier device in which the wafer is located.

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