Semiconductor structure with flush shallow trench isolation and gate oxide and method of manufacturing the same

TW202636953APending Publication Date: 2026-09-01UNITED MICROELECTRONICS CORP
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Patent Information

Application Number
TW115119018
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-05-24
Publication Date
2026-09-01

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Abstract

A method of manufacturing semiconductor structure with flush shallow trench isolation and gate oxide, including performing a first etching process to remove pad oxide at one side of the STI and recess the substrate, the first etching process also forms a recess not covering by the first etching process and a protrusion covering by the first etching process on the STI, forming a gate oxide on the recessed substrate, performing a second etching process to remove the protrusion and the pad oxide and a first oxide on a drain region, performing a third etching process to remove parts of the STI and a second oxide layer, so that a top plane of STI is flush with the gate oxide.
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