Photolithographic methods

TW202636962APending Publication Date: 2026-09-01PRAGMATIC SEMICON LTD
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Patent Information

Application Number
TW114149829
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-12-18
Filing Date
2025-12-18
Publication Date
2026-09-01

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Abstract

A photolithographic method of forming a tapered via channel in an integrated circuit, IC. The tapered via channel extends through an insulator layer sandwiched between a first conductive layer and a second conductive layer. The insulator layer comprises a photopatternable material. The tapered via channel comprises a lower opening at the boundary between the insulator layer and the first conductive layer and an upper opening at the boundary between the insulator layer and the second conductive layer. The method comprises depositing a layer of the photopatternable material onto the first conductive layer, and exposing the photopatternable material using a photomask comprising a feature corresponding to the upper opening of the tapered via channel. The exposing is arranged to facilitate tapering of the via channel.
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