Systems and methods for highly-parallel test thermal control

Abstract

Disclosed herein is a test handler and corresponding test system for thermally controlling a plurality of devices under test (DUTs) by use of one or more thermal heads, while they are being tested in parallel. In some embodiments, a thermal head comprises a heat exchanger assembly, a piston block assembly, and a match plate assembly. In some embodiments, each individual DUT may have its temperature controlled independently by components, such as individual heaters, within the thermal head. The test handler may comprise a T-tray loading area, a temperature pre-soak area, a testing area, a temperature de-soak area, and a JEDEC tray loading area. In some embodiments the pick and place mechanism in the T-tray loading area may change the pitch or grid location of DUTs picked from a transport medium on the fly to a different pitch or location grid to match the socket placement on the tester load board.

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