semiconductor wafers

Abstract

This embodiment provides a semiconductor wafer capable of suppressing probe damage during semiconductor testing and accurately measuring the current flowing between wirings after testing. The semiconductor wafer of this embodiment includes: a test pattern wiring, comprising: a first test insulating film; a first test wiring and a second test wiring, which are equally disposed across the first test insulating film and electrically insulated from each other. A first lead wiring is electrically connected to the first test wiring and is wider than the first and second test wirings. A second lead wiring is electrically connected to the second test wiring and is wider than the first and second test wirings. A third lead wiring is electrically connected to the second lead wiring and is wider than the first and second test wirings. A fourth lead wiring is disposed midway through the third lead wiring and is narrower than the third lead wiring.

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