Package substrate and manufacturing method thereof

TW202637006APending Publication Date: 2026-09-01AALTOSEMI INC
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Patent Information

Application Number
TW114107725
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-02-17
Filing Date
2025-03-03
Publication Date
2026-09-01

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Abstract

A package substrate and a fabricating method thereof are provided, wherein the package substrate comprises a core layer, a first dielectric layer and a second dielectric layer formed on opposite sides of the core layer respectively, an outer circuit layer embedded in the first dielectric layer, a circuit structure formed on the second dielectric layer, and a wiring structure formed on the first dielectric layer and the outer circuit layer. By forming the RDL form wiring structure on the first dielectric layer and the outer circuit layer, the present disclosure can prevent the asymmetric package substrate from warpage due to uneven stress distribution while meet the requirements of fine circuit.
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