Dual-layer coatings for enhanced semiconductor processing chamber protection

TW202637890APending Publication Date: 2026-09-16APPLIED MATERIALS INC
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Patent Information

Application Number
TW115100403
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-01-10
Filing Date
2026-01-06
Publication Date
2026-09-16

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Abstract

Exemplary coating methods may include providing one or more coating precursors to a processing region of a semiconductor processing chamber. The processing region may be at least partially defined by a lid and one or more walls. The coating methods may include forming plasma effluents of the one or more coating precursors. The coating methods may include depositing a first portion of a coating on the lid and one or more walls at a first pressure. The coating methods may include, subsequent to a first period of time, increasing a pressure within the processing region to a second pressure over a second period of time while depositing a second portion of the coating on the first portion of the coating. The coating methods may include depositing a third portion of the coating on the second portion of the coating over a third period of time at the second pressure.
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