Display panel

Abstract

A display panel including a first substrate, a second substrate, a liquid crystal layer, a pixel structure and a first insulation layer is provided. The first substrate and the second substrate are stacked along a first direction. The liquid crystal layer is disposed between the first substrate and the second substrate. The pixel structure is disposed on the first substrate and has a reflective area and a transmissive area. The pixel structure has a reflective layer and a pixel electrode. The reflective layer is located in the reflective area. The pixel electrode is located in the transmissive area. The first insulation layer is disposed between the liquid crystal layer and the second substrate and has a first groove located in the transmissive area. The liquid crystal layer has a first portion overlapping the first groove and a second portion overlapping the reflective layer. A thickness of the first portion along the first direction is greater than a thickness of the second portion along the first direction.

Description

Technical Field

[0001] This invention relates to a display technology, and more particularly to a display panel. Prior Technology

[0002] Semi-reflective display panels have secured a place in the market due to their good readability both indoors and outdoors and their energy-saving characteristics. In existing semi-reflective display architectures, display pixels must have reflective and transmissive areas to meet display needs when ambient light is insufficient or excessive. However, there is a significant difference in the optical path length of light within the liquid crystal layer of the reflective and transmissive areas, leading to inconsistencies in display effects (such as display brightness and color performance) and affecting the user's viewing quality. Summary of the Invention

[0003] The present invention provides a display panel that has a relatively consistent display effect in the transmissive area and the reflective area, and also has a better display contrast.

[0004] The display panel of the present invention includes a first substrate, a second substrate, a liquid crystal layer, a pixel structure, and a first insulating layer. The first substrate and the second substrate are stacked along a first direction. The liquid crystal layer is disposed between the first substrate and the second substrate. The pixel structure is disposed on the first substrate and has a reflective region and a transmissive region. The pixel structure includes a reflective layer and a pixel electrode. The reflective layer is located within the reflective region. The pixel electrode is located within the transmissive region. The first insulating layer is disposed between the liquid crystal layer and the second substrate and has a first groove located within the transmissive region. The liquid crystal layer has a first portion overlapping the first groove and a second portion overlapping the reflective layer. The first portion has a first thickness along the first direction that is greater than the second portion has a second thickness along the first direction.

[0005] In one embodiment of the present invention, the ratio of the first thickness to the second thickness of the display panel is 2.

[0006] In one embodiment of the present invention, the first insulating layer of the display panel includes a first insulating portion and a second insulating portion. The first insulating portion is located within the transmissive region and has a first insulating thickness along a first direction. The second insulating portion is located within the reflective region and has a second insulating thickness along the first direction. The second insulating thickness is greater than the first insulating thickness.

[0007] In one embodiment of the present invention, the display panel further includes a light-shielding pattern disposed on a second substrate. The first insulating layer also has a side surface surrounding and defining a first recess. The side surface of the first insulating layer overlaps the light-shielding pattern.

[0008] In one embodiment of the present invention, the first insulating layer of the display panel further has a side surface that surrounds and defines the first groove, and the side surface of the first insulating layer overlaps the reflective layer.

[0009] In one embodiment of the present invention, the display panel further includes a second insulating layer disposed between the pixel electrode and the first substrate, and having a second groove located within the penetration area. The first groove overlaps the second groove.

[0010] In one embodiment of the present invention, the first groove and the second groove of the display panel have a first depth and a second depth, respectively, and the ratio of the first depth to the second depth is greater than or equal to 0.8 and less than or equal to 1.2.

[0011] In one embodiment of the present invention, the first insulating layer of the display panel further has a first side surface surrounding and defining a first groove. The second insulating layer further has a second side surface surrounding and defining a second groove. A first portion of the liquid crystal layer has a third thickness along a second direction overlapping the first and second side surfaces. The second direction is neither parallel nor perpendicular to the first direction. The ratio of the third thickness to the second thickness is 2.

[0012] In one embodiment of the present invention, the display panel further includes a metal layer disposed on a first substrate. The second insulating layer also has a side surface surrounding and defining a second recess, and the side surface of the second insulating layer overlaps the metal layer.

[0013] In one embodiment of the present invention, the pixel electrode of the display panel is also located in the reflective area. The pixel electrode overlaps with the reflective layer and is electrically connected to the reflective layer.

[0014] Based on the above, in a display panel according to an embodiment of the present invention, the pixel structure includes a reflective area and a transmissive area. Since the insulating layer disposed between the second substrate and the common electrode layer has a groove located within the transmissive area, the thickness of the liquid crystal layer in the transmissive area is greater than its thickness in the reflective area. Therefore, the optical path difference of light within the liquid crystal layer in the reflective and transmissive areas can be effectively reduced, thereby ensuring consistent display effects in both the reflective and transmissive areas of the display panel. Simple Explanation of the Diagram

[0015] Figure 1 is a front view schematic diagram of a display panel according to an embodiment of the present invention. Figure 2 is a cross-sectional view of the display panel in Figure 1. Figure 3 is a cross-sectional schematic diagram of a display panel according to another embodiment of the present invention. Implementation

[0016] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the drawings. Wherever possible, the same element symbols are used in the drawings and description to denote the same or similar parts.

[0017] Figure 1 is a front view of a display panel according to an embodiment of the present invention. Figure 2 is a cross-sectional view of the display panel of Figure 1. For clarity, Figure 1 only shows a portion of the film layers in Figure 2.

[0018] Referring to Figures 1 and 2, the display panel 10 includes a first substrate 100, a second substrate 200, and a liquid crystal layer (LCL). The first substrate 100 and the second substrate 200 can be stacked along the Z direction. The liquid crystal layer (LCL) is disposed between the first substrate 100 and the second substrate 200. That is, the display panel 10 in this embodiment is a liquid crystal display panel, but it is not limited thereto.

[0019] In this embodiment, the first substrate 100 may be provided with multiple scan lines SL, multiple data lines DL, and multiple pixel structures PX. Each pixel structure PX is electrically connected to one scan line SL and one data line DL. It should be noted that FIG1 only shows one display pixel of the display panel 10, but the display panel 10 may be composed of multiple display pixels arranged together. For example, the multiple data lines DL may be arranged along direction X and each extend in direction Y, and the multiple scan lines SL may be arranged along direction Y and each extend in direction X, wherein direction X is not parallel to direction Y. Direction X may be selectively perpendicular to direction Y, but is not limited thereto. The multiple pixel structures PX may be arranged in multiple rows and columns along directions X and Y, respectively.

[0020] In this embodiment, the pixel structure PX includes an active element T, a common electrode CE, a capacitor electrode CPE, a pixel electrode PE, and a reflective layer RFL. The active element T has a source SE, a drain DE, a gate GE, and a semiconductor pattern SC. The source SE is electrically connected to a corresponding data line DL. The drain DE is electrically connected to the capacitor electrode CPE. The gate GE is electrically connected to a corresponding scan line SL. More specifically, the portion of the scan line SL extending from the pixel structure PX can serve as the gate GE of the active element T, while the portion of the data line DL extending from the pixel structure PX can serve as the source SE of the active element T. The material of the semiconductor pattern SC may include amorphous silicon semiconductor, single-crystal silicon semiconductor, polycrystalline silicon semiconductor, or metal oxide semiconductor. In this embodiment, the active element T is, for example, an amorphous silicon thin film transistor (a-Si TFT), but is not limited thereto. In other embodiments, the active element T may also be a polycrystalline silicon TFT (poly-Si TFT) or a metal oxide semiconductor TFT. Furthermore, in this embodiment, the gate GE may be selectively disposed below the semiconductor pattern SC to form a bottom-gate thin-film transistor, but is not limited thereto. In other embodiments, the gate GE may also be disposed above the semiconductor pattern SC to form a top-gate thin-film transistor. The capacitor electrode CPE extends from the drain electrode DE and is electrically connected to the pixel electrode PE. It should be noted that the pixel electrode PE is electrically connected to the capacitor electrode CPE via the opening OP of the insulating layer 130 and the contact hole TH between the first passivation layer 121 and the second passivation layer 122.

[0021] In this embodiment, the pixel electrode PE is a light-transmitting electrode. The light-transmitting electrode can be composed of a transparent conductive layer, which includes a transparent conductive material. For example, the material of the light-transmitting electrode includes metal oxides, such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, or other suitable oxides, or a stacked layer of at least two of the above. For conductivity considerations, the scan line SL, data line DL, capacitor electrode CPE, common electrode CE, and the source, drain, and gate electrodes GE of the active element T are generally made of metallic materials, but are not limited thereto.

[0022] A common electrode CE is disposed between the capacitor electrode CPE and the first substrate 100, and overlaps the capacitor electrode CPE along the Z direction. Unless otherwise specified below, the overlap relationship between the two components is defined by the Z direction, and the overlap direction will not be described again. In this embodiment, the common electrode CE can be electrically coupled to the capacitor electrode CPE to form a storage capacitor. More specifically, the storage capacitor is formed by the common electrode CE, the capacitor electrode CPE, and an insulating layer 110 located between the common electrode CE and the capacitor electrode CPE.

[0023] First, it should be noted that in this embodiment, the pixel structure PX may have a reflective region RA and a transmissive region TA. The pixel structure PX may also include a reflective layer RFL located within the reflective region RA, and the reflective layers RFL overlap and are electrically connected to the pixel electrode PE. The material of the reflective layer RFL includes, for example, silver, aluminum or other metals with high reflectivity, the aforementioned alloys, or the aforementioned laminated structure. A portion of the pixel electrode PE overlaps with the reflective layer RFL in the reflective region RA, while another portion overlaps with the transmissive region TA. Figure 2 illustrates an example where a portion of the pixel electrode PE is located between the reflective layer RFL and the first substrate 100, but this is not a limitation. In other embodiments, the reflective layer RFL may be located between a portion of the pixel electrode PE and the first substrate 100, and the reflective layer RFL and the pixel electrode PE are electrically connected to each other. From another perspective, the reflective region RA of the pixel structure PX is provided with the reflective layer RFL to reflect light, while the transmissive region TA of the pixel structure PX is provided with the pixel electrode PE (i.e., a light-transmitting electrode) to allow light to pass through.

[0024] When the display panel 10 displays an image, the reflective layer RFL located in the reflective area RA can reflect the ambient light AL to form reflected light REL to display the corresponding image. In the case of insufficient ambient light, a backlight module (not shown in Figure 2, which can be disposed on the side of the first substrate 100 opposite to the liquid crystal layer LCL) can be turned on as an auxiliary light source, and the light from the backlight module can pass through the pixel electrode PE located in the transmissive area TA to form transmissive light TL to display the corresponding image. In other words, the display panel 10 in this embodiment can be a transflective display panel.

[0025] In this embodiment, the scan line SL, the gate GE, and the common electrode CE can be formed on the metal layer ML1 (i.e., the metal layer ML1 may include the scan line SL, the gate GE, and the common electrode CE), while the data line DL, the source electrode SE, the drain electrode DE, and the capacitor electrode CPE can be formed on the metal layer ML2 (i.e., the metal layer ML2 may include the data line DL, the source electrode SE, the drain electrode DE, and the capacitor electrode CPE), but this is not a limitation. Further, the display panel 10 may also include a first passivation layer 121, a second passivation layer 122, and an insulating layer 130. The first passivation layer 121 is disposed between the capacitor electrode CPE (or the metal layer ML2) and the insulating layer 130, and covers the capacitor electrode CPE and the source electrode SE and drain electrode DE of the active element T. The insulating layer 130 is disposed between the first passivation layer 121 and the second passivation layer 122. The insulating layer 130 can serve as a planarization layer to reduce the unevenness of the film layer disposed between the insulating layer 130 and the first substrate 100.

[0026] The insulating layer 130 is, for example, an organic insulating layer, and its material may include polyester, polyolefin, polyacrylic, polycarbonate, polyepoxide, polystyrene, polyether, polyketone, polyol, polyaldehyde, or other suitable materials, or combinations thereof. Therefore, to prevent delamination between the insulating layer 130 and the data lines DL, capacitor electrodes CPE, and the source SE and drain DE of the active element T, this embodiment further provides a first passivation layer 121 between the insulating layer 130 and the underlying metal film layer. The first passivation layer 121 is, for example, an inorganic insulating layer, and its material may include silicon nitride, silicon oxide, aluminum oxide, or other suitable insulating materials.

[0027] A pixel electrode PE is disposed on the insulating layer 130. To further improve the adhesion between the insulating layer 130 and the transparent conductive material pixel electrode PE, a second passivation layer 122 may be disposed between the pixel electrode PE and the insulating layer 130 in this embodiment. The second passivation layer 122 is, for example, an inorganic insulating layer, and its material may include silicon nitride, silicon oxide, aluminum oxide, or other suitable insulating materials. However, the invention is not limited thereto. In other embodiments, the display panel may not have a second passivation layer 122. In this embodiment, the insulating layer 130 has an opening OP overlapping the reflective area RA, while the first passivation layer 121 and the second passivation layer 122 have contact holes TH overlapping the opening OP of the insulating layer 130 (as shown in FIG. 1). The pixel electrode PE may extend into the opening OP of the insulating layer 130 and electrically contact a portion of the capacitor electrode CPE exposed by the contact holes TH of the first passivation layer 121 and the second passivation layer 122.

[0028] Further, the display panel 10 may also include a color filter layer 210, an insulating layer 220, and a common electrode layer CEL disposed on the second substrate 200. The insulating layer 220 is located between the second substrate 200 and the liquid crystal layer LCL. The insulating layer 220 covers the color filter layer 210. In this embodiment, the material of the insulating layer 220 may be similar to the material of the insulating layer 130, but is not limited thereto. The common electrode layer CEL is disposed between the insulating layer 220 and the liquid crystal layer LCL. That is, the insulating layer 220 is located between the common electrode layer CEL and the second substrate 200. In other embodiments not shown, the common electrode layer CEL may be disposed on the first substrate 100 and located between the first substrate 100 and the liquid crystal layer LCL. The common electrode layer CEL overlaps the reflective region RA and the transmissive region TA. The material of the common electrode layer CEL may include a transparent conductive material, which may include, for example, metal oxides (e.g., indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, or other suitable oxides, or a stacked layer of at least two of the above), but is not limited thereto. For example, the electric field formed between the pixel electrode PE and the common electrode layer CEL can control the orientation of the liquid crystal molecules (not shown) in the liquid crystal layer LCL to display the corresponding image. In this embodiment, the common electrode layer CEL and the common electrode CE can receive a common voltage, but are not limited thereto.

[0029] It is particularly noteworthy that, in this embodiment, the insulating layer 220 on the second substrate 200 has a groove GV located within the transmissive region TA. Therefore, the liquid crystal layer LCL can have different thicknesses in the transmissive region TA and the reflective region RA. For example, the liquid crystal layer LCL has a first portion LCLp1 overlapping the groove GV and a second portion LCLp2 overlapping the reflective layer RFL. The first portion LCLp1 and the second portion LCLp2 of the liquid crystal layer LCL have a first thickness t1 and a second thickness t2, respectively, along the stacking direction (e.g., direction Z) of the first substrate 100 and the second substrate 200, wherein the first thickness t1 is greater than the second thickness t2. Preferably, the ratio of the first thickness t1 to the second thickness t2 can be 2.

[0030] Since the light propagation path from the incident reflection area RA to the exit reflection area RA passes through the liquid crystal layer LCL twice, while the light incident on the transmission area TA only passes through the liquid crystal layer LCL once, to avoid a significant difference in the optical path length between the reflective area RA and the transmission area TA within the liquid crystal layer LCL, the groove GV design of the insulating layer 220 allows the first thickness t1 of the liquid crystal layer LCL in the transmission area TA to be greater than its second thickness t2 in the reflective area RA, thereby increasing the optical path length within the first portion LCLp1 of the liquid crystal layer LCL. This effectively reduces the difference in optical path length between the reflective area RA and the transmission area TA within the liquid crystal layer LCL (for example, making the optical path length of the light in the reflective area RA within the liquid crystal layer LCL the same as that in the transmission area TA), contributing to improved consistency in the display effect of the display panel 10 between the reflective area RA and the transmission area TA.

[0031] From another perspective, the insulating layer 220 includes a first insulating portion 220p1 located within the penetration region TA and a second insulating portion 220p2 located within the reflection region RA. The first insulating portion 220p1 and the second insulating portion 220p2 have a first insulating thickness 220t1 and a second insulating thickness 220t2 respectively along the Z direction, and the second insulating thickness 220t2 is greater than the first insulating thickness 220t1. In this embodiment, the groove GV of the insulating layer 220 does not penetrate the insulating layer 220, but this is not a limitation. In other embodiments not shown, the groove of the insulating layer 220 may penetrate the insulating layer 220.

[0032] It should be noted that the groove GV creates a noticeable terrain undulation on one side of the liquid crystal layer LCL, resulting in unpredictable liquid crystal molecule alignment near the edge of the groove GV. This leads to light leakage and affects the dark state of the display. In other words, a light leakage region LKA is formed around the transmissive region TA.

[0033] To address the light leakage issue, the display panel 10 may further include a light-shielding pattern LSP disposed on the second substrate 200. Specifically, the insulating layer 220 also has side surfaces 220ss surrounding and defining the groove GV, and the side surfaces 220ss of the insulating layer 220 overlap with the light-shielding pattern LSP. Preferably, the orthographic projection of the side surfaces 220ss of the insulating layer 220 onto the second substrate 200 lies within the orthographic projection of the light-shielding pattern LSP onto the second substrate 200. That is, in the forward viewing direction (e.g., direction Z) of the display panel 10, the side surfaces 220ss of the insulating layer 220 and the light leakage area LKA formed therein are completely blocked by the light-shielding pattern LSP, thus avoiding dark-state light leakage and helping to improve the display contrast of the display panel 10. Furthermore, as shown in Figure 2, the reflective layer RFL in this embodiment can also extend to overlap the side surface 220ss of the insulating layer 220 (i.e., a portion of the reflective layer RFL overlaps the side surface 220ss of the insulating layer 220 and the light leakage region LKA formed therein), to further block light leakage and improve contrast. Preferably, the orthographic projection of the side surface 220ss of the insulating layer 220 on the second substrate 200 is located within the orthographic projection of the reflective layer RFL on the second substrate 200.

[0034] The following examples illustrate this disclosure in detail, wherein the same components will be labeled with the same symbols, and descriptions of the same technical content will be omitted. For the omitted parts, please refer to the foregoing examples, which will not be repeated below.

[0035] Figure 3 is a cross-sectional schematic diagram of a display panel according to another embodiment of the present invention. Referring to Figure 3, the main difference between the display panel 10A of this embodiment and the display panel 10 of Figure 2 is that the number of insulating layers with grooves is different. Specifically, in the display panel 10A of this embodiment, in addition to the insulating layer 220A on the second substrate 200 having a groove GV1 located in the penetration region TA, the insulating layer 130A on the first substrate 100 also has a groove GV2 located in the penetration region TA. The groove GV1 of the insulating layer 220A overlaps the groove GV2 of the insulating layer 130A.

[0036] It is particularly noteworthy that, in this embodiment, the liquid crystal layer LCL has grooves in the insulating layer on both opposite sides, and the depth of each of the two grooves can be less than the depth of the groove GV in Figure 2, which can also effectively reduce the optical path difference of light in the liquid crystal layer LCL between the reflective region RA and the transmissive region TA. Therefore, compared with the depth of the groove GV in Figure 2, the depth of each groove in this embodiment can be further reduced. For example, in this embodiment, the insulating layer 220A and the insulating layer 130A have grooves GV1 and GV2 respectively, and the liquid crystal layer LCL has a first part LCLp1 overlapping grooves GV1 and GV2 and a second part LCLp2 overlapping the reflective layer RFL. The first part LCLp1 and the second part LCLp2 of the liquid crystal layer LCL have a first thickness t1 and a second thickness t2 along the Z direction, respectively, wherein the first thickness t1 is greater than the second thickness t2. Preferably, the ratio of the first thickness t1 to the second thickness t2 can be 2. As shown in Figure 3, by providing two grooves GV1 and GV2, a portion of the first part LCLp1 of the liquid crystal layer LCL (or referred to as the first sub-part of the first part LCLp1) is higher than the second part LCLp2 of the liquid crystal layer LCL in the Z direction, and the other portion of the first part LCLp1 of the liquid crystal layer LCL (or referred to as the second sub-part of the first part LCLp1) is lower than the second part LCLp2 of the liquid crystal layer LCL in the Z direction. Preferably, the thickness of the first sub-part of the first part LCLp1 of the liquid crystal layer LCL can be the same as the thickness of the second sub-part of the first part LCLp1.

[0037] The presence of groove GV1 causes significant terrain undulations on one side of the liquid crystal layer LCL due to the insulating layer 220A and the film layer formed behind it (e.g., the common electrode layer CEL). Similarly, the presence of groove GV2 causes significant terrain undulations on one side of the liquid crystal layer LCL due to the insulating layer 130A and the film layer formed behind it (e.g., the metal layer ML3, the second passivation layer 122, and the pixel electrode PE). This results in unpredictable liquid crystal molecule alignment near the edges of grooves GV1 and GV2, leading to light leakage and affecting the dark state of the display. Specifically, a light leakage region LKA forms around the transmissive region TA. In this embodiment, the configuration of grooves GV1 and GV2 further reduces the depth of each groove, thereby reducing the area of ​​poor alignment of the liquid crystal layer LCL near the groove edges. In other words, the width W2 of the light leakage area LKA generated by the two grooves GV1 and GV2 in the display panel 10A of this embodiment can be smaller than the width W1 of the light leakage area LKA generated by the groove GV in the display panel 10 of FIG. 2. This reduces the area that the light-shielding pattern LSP needs to block. To further reduce the width W2 of the light leakage area LKA in FIG. 3, the ratio of the depth dt1 of groove GV1 to the depth dt2 of groove GV2 can be greater than or equal to 0.8 and less than or equal to 1.2, but is not limited thereto. For example, the depth dt1 of groove GV1 of insulating layer 220A can be the same as the depth dt2 of groove GV2 of insulating layer 130A (for example, the depths dt1 and dt2 of groove GV1 and groove GV2 can each be half the depth dt of groove GV in FIG. 2). Furthermore, in some embodiments, reducing the depth of the grooves can further reduce the coating thickness of the insulating layer. In this embodiment, the groove GV1 of the insulating layer 220A does not penetrate the insulating layer 220A, and the groove GV2 of the insulating layer 130A does not penetrate the insulating layer 130A, but this is not a limitation. In other embodiments not shown, the groove of the insulating layer 220A may penetrate the insulating layer 220A, and / or the groove of the insulating layer 130A may penetrate the insulating layer 130A.

[0038] On the other hand, in this embodiment, the display panel 10A may further include a metal layer ML3 disposed on the first substrate 100 and located between the second passivation layer 122 and the insulating layer 130A. For example, the pixel structure in this embodiment may further include a common electrode CE” formed on the metal layer ML3, wherein the capacitor electrode CPE and the pixel electrode PE are each electrically coupled to the common electrode CE” and form an additional storage capacitor. In this embodiment, the common electrode layer CEL, the common electrode CE, and the common electrode CE” may receive a common voltage, but are not limited thereto.

[0039] Of particular note is that the metal layer ML3 (or common electrode CE”) can also extend from the reflective region RA to the light leakage region LKA to block light leakage. More specifically, the insulating layer 130A surrounds and defines the side surface 130ss of the groove GV2, which can overlap the metal layer ML3. Preferably, the orthographic projection of the side surface 130ss of the insulating layer 130A surrounding and defining the groove GV2 on the first substrate 100 is within the orthographic projection of the metal layer ML3 on the first substrate 100. In addition, the insulating layer 220A surrounds and defines the groove GV1 The side surface 220ss of the insulating layer 220A may overlap the metal layer ML3. Preferably, the orthographic projection of the side surface 220ss of the insulating layer 220A onto the first substrate 100 may lie within the orthographic projection of the metal layer ML3 onto the first substrate 100. It should be noted that although FIG3 illustrates the second passivation layer 122 overlapping the groove GV2, this is not a limitation. In other embodiments, the portion of the second passivation layer 122 overlapping the groove GV2 but not the metal layer ML3 may be removed to adjust the first thickness t1 of the liquid crystal layer LCL.

[0040] On the other hand, in this embodiment, the first portion LCLp1 of the liquid crystal layer LCL located within the transmissive region TA has a third thickness t3 along an inclined direction OD (i.e., a second direction) deviating from the Z direction (i.e., the first direction), overlapping the side surface 220ss of the insulating layer 220A and the side surface 130ss of the insulating layer 130A, and the ratio of the third thickness t3 to the second thickness t2 can be 2. More specifically, the first thickness t1 of the liquid crystal layer LCL can be the same as the third thickness t3, and the ratio of either the first thickness t1 or the third thickness t3 to the second thickness t2 can be 2. The inclined direction OD is neither parallel nor perpendicular to the Z direction. Accordingly, the consistency of the display effect of the display panel 10A in the reflective region RA and the transmissive region TA under a side viewing angle can be further improved.

[0041] In summary, in a display panel according to an embodiment of the present invention, the pixel structure includes a reflective region and a transmissive region. Because the insulating layer disposed between the second substrate and the common electrode layer has a groove located within the transmissive region, the thickness of the liquid crystal layer in the transmissive region is greater than its thickness in the reflective region. Therefore, the optical path difference of light within the liquid crystal layer in the reflective and transmissive regions can be effectively reduced, thereby ensuring consistent display effects in both the reflective and transmissive regions.

[0042] 10, 10A: Display panel 100: First substrate 110, 130, 130A, 220, 220A: Insulation layer 121: First passivation layer 122: Second passivation layer 130ss, 220ss: Side view 200: Second substrate 210: Color filter layer 220p1: First Insulation Section 220p2: Second insulation section 220t1: First insulation thickness 220t2: Second insulation thickness AL: Ambient Light CE, CE”: Common electrode CEL: Common Electrode Layer CPE: Capacitor Electrode DE: drain DL: Data Line dt, dt1, dt2: Depth GE: Gate GV, GV1, GV2: Groove LCL: Liquid Crystal Layer LCLp1: Part 1 LCLp2: Part Two LKA: Light Leakage Zone LSP: Light-blocking pattern ML1, ML2, ML3: Metal layers OD: Inclination direction OP: Open PE: pixel electrode PX: Pixel Structure RA: Reflection Zone REL: Reflected light RFL: Reflective layer SC: Semiconductor Pattern SE: Source SL: Scan line T: Active component TA: Penetration Zone TH: Contact Hole TL: Transmitting Light t1: First thickness t2: Second thickness t3: Third thickness W1, W2: Width X, Y, Z: Direction θ: included angle

Claims

1. A display panel, comprising: The first substrate and the second substrate are stacked along a first direction; A liquid crystal layer is disposed between the first substrate and the second substrate; A pixel structure is disposed on the first substrate and has a reflective region and a transmissive region. The pixel structure includes: a reflective layer located in the reflective region; and a pixel electrode located in the transmissive region; a first insulating layer disposed between the liquid crystal layer and the second substrate and having a first groove located in the transmissive region; and a second insulating layer disposed between the reflective layer and the first substrate, wherein the second insulating layer has a second groove located in the transmissive region, the first groove overlaps the second groove, the first groove and the second groove have a first depth and a second depth respectively, and the ratio of the first depth to the second depth is greater than or equal to 0.8 and less than or equal to 1.2, wherein the liquid crystal layer has a first portion overlapping the first groove and the second groove and a second portion overlapping the reflective layer, and the first thickness of the first portion along the first direction is greater than the second thickness of the second portion along the first direction.

2. The display panel as claimed in claim 1, wherein the ratio of the first thickness to the second thickness is 2.

3. The display panel as claimed in claim 1, wherein the first insulating layer comprises: The first insulating portion is located within the penetration area and has a first insulating thickness along the first direction; And a second insulating portion, located within the reflective area, and having a second insulating thickness along the first direction, the second insulating thickness being greater than the first insulating thickness.

4. The display panel as described in claim 1, further comprising: A light-shielding pattern is disposed on the second substrate, wherein the first insulating layer further has a side surface that surrounds and defines the first groove, and the side surface of the first insulating layer overlaps the light-shielding pattern.

5. The display panel as claimed in claim 1, wherein the first insulating layer further has a side surface surrounding and defining the first recess, and the side surface of the first insulating layer overlaps the reflective layer.

6. The display panel as claimed in claim 1, wherein the first insulating layer further has a first side surface surrounding and defining the first recess, the second insulating layer further has a second side surface surrounding and defining the second recess, the first portion of the liquid crystal layer having a third thickness along a second direction overlapping the first side surface and the second side surface, the second direction being neither parallel nor perpendicular to the first direction, and the ratio of the third thickness to the second thickness being 2.

7. The display panel as described in claim 1, further comprising: A metal layer is disposed on the first substrate, wherein the second insulating layer further has a side surface surrounding and defining the second groove, and the side surface of the second insulating layer overlaps the metal layer.

8. The display panel as claimed in claim 1, wherein the pixel electrode is also located in the reflective area, the pixel electrode overlaps the reflective layer, and is electrically connected to the reflective layer.

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