Power management device and power management method

Abstract

A power management device includes a plurality of controllers and a power detection signal generator. The plurality of controllers respectively generate a plurality of power state signals. The power detection signal generator is coupled to the plurality of controllers, receives the plurality of power state signals, and generates a detection result signal according to the plurality of power state signals. The detection result signal has an oscillation frequency. The power detection signal generator sets the oscillator frequency of the detection result signal according to the plurality of power state signals.

Description

Technical Field

[0001] This invention relates to a power management device and a power management method, and more particularly to a power management device and a power management method for servers. Prior Technology

[0002] In conventional servers, the power status of multiple hot-swappable controllers needs to be monitored by detecting multiple power status signals, such as a power good signal. Therefore, connectors with multiple pins and multiple wires are required to transmit these power status signals to a judgment circuit. The judgment circuit then determines the power status of each hot-swappable controller. This approach increases the server's manufacturing cost and reduces its performance. Summary of the Invention

[0003] This invention provides a power management device and a power management method, which can effectively manage the power status of a server.

[0004] The power management device of the present invention includes multiple controllers and a power detection signal generator. The multiple controllers generate multiple power status signals respectively. The power detection signal generator is coupled to the controllers, receives the power status signals, and generates a detection result signal based on the power status signals. The detection result signal has an oscillation frequency. The power detection signal generator sets the oscillation frequency of the detection result signal based on the power status signals.

[0005] The power management method of the present invention includes: generating multiple power status signals by multiple controllers respectively; generating a detection result signal by a power detection signal generator in response to the power status signals; and adjusting the oscillation frequency of the detection result signal by the power detection signal generator according to the power status signals.

[0006] Based on the above, the power management device and power management method of the present invention, by setting a power detection signal generator, adjusts the oscillation frequency of the detection result signal according to the power status signal of the controller. Furthermore, the power management device can determine the power status of multiple controllers in the server based on the oscillation frequency of the detection result signal of a single signal, which can reduce the number of pins and wiring space required between the server's circuit boards, thereby effectively reducing the server's manufacturing cost and improving its performance. Simple Explanation of the Diagram

[0007] Figure 1 illustrates a schematic diagram of a power management device according to an embodiment of the present invention. Figure 2 illustrates a circuit diagram of a power detection signal generator according to an embodiment of the present invention. Figure 3 illustrates a schematic diagram of a server according to an embodiment of the present invention. Figure 4 illustrates a flowchart of a power management method according to an embodiment of the present invention. Figure 5 illustrates a flowchart of a power management method according to an embodiment of the present invention. Implementation

[0008] Please refer to Figure 1, which illustrates a schematic diagram of a power management device 100 according to an embodiment of the present invention. As shown in Figure 1, the power management device 100 includes a plurality of controllers 110[1] to 110[n] and a power detection signal generator 120. In this embodiment, the number of controllers 110[1] to 110[n] can be n, where n is a positive integer greater than 1. The controllers 110[1] to 110[n] can generate a plurality of power status signals VPG[1] to VPG[n] according to their respective power status. In detail, taking controller 110[1] as an example, controller 110[1] can generate a corresponding power status signal VPG[1] according to whether the power supply voltage it receives has risen to a stable voltage value. For example, when the power supply voltage received by controller 110[1] rises to a stable voltage value, controller 110[1] can generate a power status signal VPG[1] with a first logic value; conversely, when the power supply voltage received by controller 110[1] does not rise to a stable voltage value, controller 110[1] can generate a power status signal VPG[1] with a second logic value. The first logic value and the second logic value are different. In this embodiment of the invention, controllers 110[1] to 110[n] can all be hot-swappable controllers.

[0009] Furthermore, the power detection signal generator 120 is coupled to controllers 110[1] to 110[n]. The power detection signal generator 120 receives power status signals VPG[1] to VPG[n] and generates a detection result signal Vint based on the power status signals VPG[1] to VPG[n]. In detail, the power detection signal generator 120 can generate a detection result signal Vint, and the power detection signal generator 120 can set the oscillation frequency of the detection result signal Vint based on the power status signals VPG[1] to VPG[n]. For example, the power detection signal generator 120 can set the oscillation frequency of the corresponding detection result signal Vint based on various combinations of multiple logic values ​​of the power status signals VPG[1] to VPG[n]. Taking the number of power state signals VPG[1]~VPG[n] as n as an example, the power detection signal generator 120 can correspond to various combinations of the logic value states of the power state signals VPG[1]~VPG[n], so that the detection result signal Vint can have 2^n different oscillation frequencies.

[0010] As can be seen from the above, by detecting the oscillation frequency of the detection result signal Vint, the logic values ​​of the power status signals VPG[1] to VPG[n] generated by each controller 110[1] to 110[n] can be determined, and it can also be determined whether the power status of each controller 110[1] to 110[n] is normal. It is worth mentioning that the detection result signal Vint is a single-bit signal and can be transmitted through only a single pin and a single wire. Therefore, by setting the power detection signal generator 120 of the present invention in an electronic device (such as a server), the number of pins and wiring space required by the electronic device can be reduced, thereby reducing the manufacturing cost of the server and improving the working performance of the server.

[0011] Please refer to Figure 2, which shows a circuit diagram of a power detection signal generator 120 according to an embodiment of the present invention. In this embodiment, the power detection signal generator 120 can be implemented by the circuit shown in Figure 2. As shown in Figure 2, the power detection signal generator 120 includes an oscillating circuit OSC and a variable capacitor circuit CTC. The oscillating circuit OSC is used to generate a detection result signal Vint. The variable capacitor circuit CTC is coupled to the oscillating circuit OSC, receives power status signals VPG[1], VPG[2], VPG[3], and VPG[4], and adjusts the provided equivalent capacitance value according to the power status signals VPG[1], VPG[2], VPG[3], and VPG[4]. It should be understood that in this embodiment, the number of controllers (=4) is only an illustrative example, and in actual applications, there is no particular limitation on the number of controllers.

[0012] In detail, the variable capacitor circuit CTC includes multiple capacitors C1~C4 and multiple switches M1~M4. Switches M1~M4 are connected in series with capacitors C1~C4 to form multiple capacitor-switch strings MC1~MC4. Terminals n1 of capacitor-switch strings MC1, n2 of MC2, n3 of MC3, and n4 of MC4 are coupled to the oscillation circuit OSC. Terminals n5 of MC1, n6 of MC2, n7 of MC3, and n8 of MC4 can all receive a reference voltage Vref. In this embodiment, the reference voltage Vref can be ground voltage (i.e., 0V).

[0013] Furthermore, switches M1 to M4 are controlled by power state signals VPG[1], VPG[2], VPG[3], and VPG[4], respectively. In other words, switches M1 to M4 are turned on or off according to power state signals VPG[1], VPG[2], VPG[3], and VPG[4]. When switch M1 changes from being off to being on, the path of capacitor C1 coupled to the oscillator circuit OSC can be turned on, and the capacitance value CT provided by the variable capacitor circuit CTC can be increased; conversely, when switch M1 changes from being on to being off, the path of capacitor C1 coupled to the oscillator circuit OSC can be turned off, and the capacitance value CT provided by the variable capacitor circuit CTC can be decreased. Similarly, switches M2 to M4 are also like this. That is, when switches M2, M3, or M4 are changed from being off to being on, the path of capacitors C2, C3, or C4 coupled to the oscillator circuit OSC can be changed to be on, and the capacitance value CT provided by the variable capacitor circuit CTC can be increased; conversely, when switches M2, M3, or M4 are changed from being on to being off, the path of capacitors C2, C3, or C4 coupled to the oscillator circuit OSC can be changed to be off, and the capacitance value CT provided by the variable capacitor circuit CTC can be decreased. Therefore, by switching switches M2~M4 using power status signals VPG[1], VPG[2], VPG[3], and VPG[4], the capacitance value CT provided by the variable capacitor circuit CTC can be adjusted.

[0014] Furthermore, in this embodiment, switches M1 to M4 can be transistor switches. Correspondingly, power status signals VPG[1], VPG[2], VPG[3], and VPG[4] can be voltage signals, and are respectively provided to the control terminals of switches M1 to M4 to turn switches M1 to M4 on or off. In this embodiment, the voltage of each power status signal VPG[1], VPG[2], VPG[3], or VPG[4] can be equal to a high voltage level or a low voltage level. Under this configuration, each power status signal VPG[1], VPG[2], VPG[3], or VPG[4] can optionally correspond to a logic value of 0 or 1, wherein logic values ​​0 and 1 can respectively indicate an abnormal power status and a normal power status. Alternatively, in other embodiments of the present invention, logic values ​​1 and 0 can respectively indicate an abnormal power status and a normal power status, without any certain limitation.

[0015] Furthermore, it is worth noting that in this embodiment, the capacitance values ​​Cv1 of capacitor C1, Cv2 of capacitor C2, Cv3 of capacitor C3, and Cv4 of capacitor C4 can be different from each other. For example, {Cv1, Cv2, Cv3, Cv4} = {1pF, 4pF, 8pF, 16pF} and {Cv1, Cv2, Cv3, Cv4} = {0.1pF, 1pF, 4pF, 8pF}, where pF is picofarad. It is important to note that the capacitance values ​​Cv1 to Cv4 can be set according to actual needs without any fixed limitations. In this way, through the various implementation methods described above, the variable capacitor circuit CTC can provide a suitable capacitance value CT to generate the oscillation frequency of the oscillation circuit OSC, which can distinguish different power supply states.

[0016] On the other hand, the oscillation circuit OSC adjusts the oscillation frequency of the detection result signal Vint based on the capacitance value CT provided by the variable capacitor circuit CTC. In this embodiment, the capacitance value CT provided by the variable capacitor circuit CTC can be used to adjust the transmission delay of the signal inside the oscillation circuit OSC, thereby adjusting the oscillation frequency of the detection result signal Vint. When the capacitance value CT provided by the variable capacitor circuit CTC increases, the oscillation frequency of the detection result signal Vint is correspondingly reduced; conversely, when the capacitance value CT provided by the variable capacitor circuit CTC decreases, the oscillation frequency of the detection result signal Vint is correspondingly increased.

[0017] The oscillator circuit OSC may include an operational amplifier OP, a feedback circuit FC1, and a feedback circuit FC2. As shown in Figure 2, the operational amplifier OP has a negative input terminal nin1. The negative input terminal nin1 is coupled to the variable capacitor circuit CTC. The feedback circuit FC1 is coupled between the output terminal nout of the operational amplifier OP and the negative input terminal nin1 of the operational amplifier OP. The feedback circuit FC2 is coupled between the output terminal nout of the operational amplifier OP and the positive input terminal nin2 of the operational amplifier OP.

[0018] In this embodiment, the feedback circuit FC1 may include a resistor R1. One end of resistor R1 is coupled to the output terminal nout of operational amplifier OP. The other end of resistor R1 is coupled to the negative input terminal nin1 of operational amplifier OP. In this embodiment, the feedback circuit FC2 may include resistors R2 and R3. One end of resistor R2 is coupled to the output terminal nout of operational amplifier OP. The other end of resistor R2 is coupled to the positive input terminal nin2 of operational amplifier OP. One end of resistor R3 is coupled to the positive input terminal nin2 of operational amplifier OP. The other end of resistor R3 is coupled to the reference voltage Vref. Under the above configuration, the oscillation frequency F can be calculated according to formula (1) as follows: ...Formula (1), Where Rv1, Rv2, and Rv3 are the resistance values ​​of resistors R1, R2, and R3, respectively. In this embodiment, the resistance value Rv2 can be the same as the resistance value Rv3, for example, Rv1 = Rv2 = 10 kiloohms (kΩ). In this way, the period (the reciprocal of the oscillation frequency F, 1 / F) can be proportional to... It is worth noting that the resistance values ​​of resistors R1 to R3 can be set according to actual needs without any fixed restrictions. Furthermore, for the circuit shown in Figure 2, the capacitance value CT provided by the variable capacitor circuit CTC is: ...Formula (2), Where Cvjc is the capacitance of the switch when it is turned on minus the equivalent capacitance of the switch string. For example, if switches M1 and M4 are turned on and switches M2 and M3 are turned off, then CT = Cv1 + Cv2.

[0019] Please refer to Figures 1 and 3 together, where Figure 3 illustrates a schematic diagram of a server 300 according to an embodiment of the present invention. In this embodiment, the power management device may further include the judgment circuit 310 shown in Figure 3. Specifically, the power management device 100 of Figure 1 is further coupled to the judgment circuit 310 via a power detection signal generator 120 to form the power management device 100A in Figure 3. In addition, the judgment circuit 310 is coupled to the power detection signal generator 120, receives the detection result signal Vint, and determines the power state of each controller 110[1], 110[2], ... or 110[n] based on the oscillation frequency of the detection result signal Vint. In this embodiment, the judgment circuit 310 and the power detection signal generator 120 may be coupled through connectors Con1 to Con3. In detail, connector Con1 includes at least one pin to transmit the detection result signal Vint to connector Con2; connector Con2 may be a transmission line; and connector Con3 may be a connection port. Furthermore, in this embodiment, the determination circuit 310 may be a complex programmable logic device (CPLD).

[0020] In this embodiment, the judgment circuit 310 may include a lookup table. The lookup table records the relationship between the oscillation frequency of the detection result signal Vint and the logical values ​​of the power state signals VPG[1]~VPG[n]. The relationship between the oscillation frequency and the power state signals VPG[1]~VPG[n] will change with the capacitor values ​​Cv1~Cvn and the resistor values ​​Rv1~Rv3. The following explanation uses n=4, Rv1=25kΩ and Rv2=Rv3 as examples.

[0021] When {Cv1,Cv2,Cv3,Cv4} = {1pf,4pf,8pf,16pf}, the lookup table is shown in Table 1, where the oscillation frequency is in Hertz (Hz): V PG[1] V PG[2] V PG[3] V PG[4] Oscillation frequency 0 0 0 0 0 0 0 0 1 1138Hz 0 0 1 0 2276Hz 0 0 1 1 759Hz 0 1 0 0 4551Hz 0 1 0 1 910Hz 0 1 1 0 1517Hz 0 1 1 1 650Hz 1 0 0 0 18205Hz 1 0 0 1 1071Hz 1 0 1 0 2023Hz 1 0 1 1 728Hz 1 1 0 0 3641Hz 1 1 0 1 867Hz 1 1 1 0 1400Hz 1 1 1 1 628Hz Table 1

[0022] When {Cv1, Cv2, Cv3, Cv4} = {0.1pf, 1pf, 4pf, 8pf}, the lookup table is shown in Table 2, where the oscillation frequency is in Hertz (Hz): V PG[1] V PG[2] V PG[3] V PG[4] Oscillation frequency 0 0 0 0 0 0 0 0 1 2276Hz 0 0 1 0 4551Hz 0 0 1 1 1517Hz 0 1 0 0 18205Hz 0 1 0 1 2100Hz 0 1 1 0 3641Hz 0 1 1 1 1400Hz 1 0 0 0 182048Hz 1 0 0 1 2348Hz 1 0 1 0 4440Hz 1 0 1 1 1505Hz 1 1 0 0 16550Hz 1 1 0 1 2001Hz 1 1 1 0 3570Hz 1 1 1 1 1350Hz Table 2

[0023] By comparing Table 1 and Table 2, it can be seen that as the difference between capacitance values ​​Cv1, Cv2, Cv3, and Cv4 increases, the difference in oscillation frequency corresponding to different power supply status signals {VPG[1], VPG[2], VPG[3], VPG[4]} also increases.

[0024] The judgment circuit 310 can use a lookup table to find the power state of each controller 110[1], 110[2], ... or 110[n] based on the oscillation frequency of the detection result signal V int. For example, when {Cv1,Cv2,Cv3,Cv4} = {1pf,4pf,8pf,16pf}, if the oscillation frequency is 1071Hz, the judgment circuit 310 finds the power state of controllers 110[1] and 110[4] to be normal and the power state of controllers 110[2] and 110[3] to be abnormal based on Table 1. For another example, when {Cv1,Cv2,Cv3,Cv4} = {0.1pf,1pf,4pf,8pf}, if the oscillation frequency is 1350Hz, the judgment circuit 310 finds the power state of controllers 110[1] to 110[4] to be normal based on Table 2.

[0025] In this embodiment, the lookup table can be constructed using memory elements or circuits capable of data storage that are well known to those skilled in the art. For example, various types of memory, temporary registers, or electronic fuses are used, without any particular limitation.

[0026] When the power management device 100A monitors the power status of the server, it can be further coupled to a controller on the server's board. Therefore, as shown in FIG3, the server 300 includes a power management device 100A and a controller 320. Specifically, the controller 320 is coupled to a decision circuit 310 in the power management device 100A. In this embodiment, the power management device 100A and the decision circuit 310 can be coupled to each other via connectors Con4 and Con5.

[0027] Furthermore, in this embodiment, controllers 110[1]~110[n] and power detection signal generator 120 can be mounted on circuit board MB, such as a Medusa board. In this embodiment, the judgment circuit 310 can be mounted on circuit board SB, such as a spider board. In this embodiment, controller 320 can be mounted on baseboard BB, such as a server motherboard. In this embodiment, controller 320 can be a baseboard management controller (BMC).

[0028] Please refer to Figures 1, 3, and 4 together. Figure 4 illustrates a flowchart of a power management method 400 according to some embodiments of the present invention. It should be understood that the power management method 400 is merely an illustrative example, and therefore, the steps described with respect to the power management method 400 can be reordered, added, or deleted while remaining within the scope of this disclosure.

[0029] In step 410, multiple controllers 110[1]~110[n] generate multiple power status signals VPG[1]~VPG[n]. In step 420, the power detection signal generator 120 generates a detection result signal Vint in response to the power status signals VPG[1]~VPG[n]. And, in step 430, the power detection signal generator 120 adjusts the oscillation frequency of the detection result signal Vint according to the power status signals VPG[1]~VPG[n]. In detail, the power detection signal generator 120 adjusts the capacitance value CT of the variable capacitor circuit CTC according to the power status signals VPG[1]~VPG[n]. Further, the power detection signal generator 120 adjusts the oscillation frequency of the detection result signal Vint by using the capacitance value CT of the variable capacitor circuit CTC.

[0030] Next, the judgment circuit 310 determines the power state of each controller 110[1], 110[2], ..., or 110[n] based on the oscillation frequency of the detection result signal Vint. In detail, the judgment circuit 310 can pre-record the relationship between the oscillation frequency of the detection result signal Vint and the power state signals VPG[1] to VPG[n] to obtain a lookup table. Further, the judgment circuit 310 uses the lookup table to find the power state of each controller 110[1], 110[2], ..., or 110[n] based on the oscillation frequency of the detection result signal Vint.

[0031] Please refer to Figures 2 and 5 together. Figure 5 illustrates a flowchart of a power management method 500 according to some embodiments of the present invention. More specifically, when the power detection signal generator 120 is implemented by the circuit shown in Figure 2, the power management devices 100 and 100A can be operated by the power management method 500, wherein switches M1 to M4 can be constructed by N-type transistors. The determination circuit 310 can be a processor with computing capabilities, or it can be a hardware circuit designed using a Hardware Description Language (HDL) or any other digital circuit design method well known to those skilled in the art, and implemented using a Field Programmable Gate Array (FPGA), Complex Programmable Logic Device (CPLD), or Application-specific Integrated Circuit (ASIC). It should be understood that the power management method 500 is only an illustrative example, and therefore, the steps described with respect to the power management method 500 can be reordered, added, or deleted while remaining within the scope of this disclosure.

[0032] In other embodiments of the present invention, switches M1 to M4 can also be constructed using P-type transistors. The transistors used to construct switches M1 to M4 can be of any form, without specific limitations.

[0033] In step 510, at least one of the power state signals VPG[1] to VPG[n] is pulled up by at least one of the controllers 110[1] to 110[n]. In other words, the at least one of the power state signals VPG[1] to VPG[n] is made equal to a high voltage level. In step 520, in response to pulling up the at least one of the power state signals VPG[1] to VPG[n], the transistor switch receiving the at least one of the power state signals VPG[1] to VPG[n] is turned on. For example, when the power state signal VPG[1] is pulled up, the transistor switch M1 is turned on.

[0034] In step 530, at least one input signal is transmitted to the negative input terminal nin1 of the operational amplifier OP via a turned-on transistor switch. The at least one input signal is then transmitted to the output terminal nout of the transport amplifier OP via the feedback circuit FC1, thus forming negative feedback.

[0035] In step 540, the operational amplifier OP outputs the detection result signal V int at the output terminal n out.

[0036] In step 550, the complex programmable device receives the detection result signal Vint and detects the oscillation frequency of the detection result signal Vint.

[0037] In step 560, the complex programmable device determines the power state of each controller 110[1], 110[2], ... or 110[n] based on the oscillation frequency of the detection result signal Vint. It should be noted that since the complex programmable device is one example of the judgment circuit 310, the operation mode of the judgment circuit 310 in the above method 400 can be applied to the complex programmable device. For the sake of simplicity, it will not be described in detail here.

[0038] In summary, the power management device and power management method of the present invention determine the power status of multiple controllers by using the oscillation frequency of the detection result signal of a single signal generated by a power detection signal generator. This reduces the number of required pins and wiring space, thereby reducing manufacturing costs and improving work efficiency.

[0039] 100, 100A: Power management device 110[1], 110[n]: Controller 120: Power Detection Signal Generator 300: Server 310: Judgment Circuit 320: Controller 410, 420, 430: Steps 510, 520, 530, 540, 550, 560: Steps BB: base board C1~C4: Capacitors Con1~Con5: Connectors CTC: Variable Capacitor Circuit FC1, FC2: Feedback circuits M1~M4: Switches MB: Circuit Board MC1~MC4: Capacitor-switch string n1~n8: End n in1: Negative input terminal n in2: Positive input terminal n out: Output terminal OP: Operational amplifier OSC: Oscillator Circuit R1~R3: Resistors SB: Circuit board VPG[1], VPG[2], VPG[3], VPG[4], VPG[n]: Power status signals V int: Detection result signal V ref: Reference voltage

Claims

1. A power management device, comprising: a plurality of controllers, each generating a plurality of power status signals; and a power detection signal generator coupled to the controllers, receiving the power status signals and generating a detection result signal based on the power status signals, wherein... The detection result signal has an oscillation frequency. The power detection signal generator sets the oscillation frequency of the detection result signal according to the power status signals. A judgment circuit is coupled to the power detection signal generator, receives the detection result signal, and determines the power status of each controller according to the oscillation frequency of the detection result signal.

2. The power management device as claimed in claim 1, wherein the power detection signal generator comprises: an oscillation circuit for generating the detection result signal; and a variable capacitor circuit coupled to the oscillation circuit and receiving the power status signals, the variable capacitor circuit adjusting a provided capacitance value according to the power status signals, wherein... The oscillation circuit adjusts the oscillation frequency of the detection result signal based on the capacitance value provided by the variable capacitor circuit.

3. The power management device as claimed in claim 2, wherein the oscillation circuit comprises: an operational amplifier having a negative input coupled to the variable capacitor circuit; a first feedback circuit coupled between the output of the operational amplifier and the negative input of the operational amplifier; and a second feedback circuit coupled between the output of the operational amplifier and the positive input of the operational amplifier.

4. The power management device as claimed in claim 3, wherein the first feedback circuit includes a first resistor, a first end of which is coupled to the output of the operational amplifier, and a second end of which is coupled to the negative input of the operational amplifier.

5. The power management device as claimed in claim 4, wherein the second feedback circuit includes a second resistor and a third resistor, a first end of the second resistor being coupled to the output of the operational amplifier, a second end of the second resistor being coupled to the positive input of the operational amplifier, a first end of the third resistor being coupled to the positive input of the operational amplifier, and a second end of the third resistor receiving a reference voltage.

6. The power management device as claimed in claim 5, wherein the resistance value of the second resistor is the same as the resistance value of the third resistor.

7. The power management device as claimed in claim 2, wherein the variable capacitor circuit comprises: a plurality of capacitors; and a plurality of switches, wherein the switches are connected in series with the capacitors to form a plurality of capacitor-switch strings, the first ends of the capacitor-switch strings are coupled to the oscillation circuit, the second ends of the capacitor-switch strings are coupled to a reference voltage, and the switches are controlled by the power status signals.

8. The power management device as claimed in claim 7, wherein the capacitance values ​​of the capacitors are not the same as each other.

9. The power management device as claimed in claim 7, wherein each of the switches is a transistor switch, the power status signals are voltage signals, and are respectively provided to the control terminals of the switches.

10. The power management device of claim 9, wherein the voltage of each power status signal is equal to a first voltage level or a second voltage level, wherein, The first voltage level is greater than a voltage threshold of the corresponding switch, and the second voltage level is less than the voltage threshold of the corresponding switch.

11. The power management device of claim 1, wherein the determination circuit includes a lookup table that records the relationship between the oscillation frequency of the detection result signal and the power status signals, wherein the determination circuit, based on the lookup table, determines the power status of each controller according to the oscillation frequency of the detection result signal.

12. The power management device as claimed in claim 1, wherein the controllers and the power detection signal generator are disposed on a first circuit board.

13. The power management device as claimed in claim 12, wherein the determination circuit is disposed on a second circuit board different from the first circuit board.

14. A power management method comprising: generating a plurality of power status signals by a plurality of controllers; generating a detection result signal by a power detection signal generator in response to the power status signals; adjusting an oscillation frequency of the detection result signal by the power detection signal generator based on the power status signals; and determining the power status of each controller by a determination circuit based on the oscillation frequency of the detection result signal.

15. The power management method of claim 14, wherein the step of determining the power state of each controller by the determination circuit based on the oscillation frequency of the detection result signal comprises: recording the relationship between the oscillation frequency of the detection result signal and the power state signals to obtain a lookup table; and based on the lookup table, finding the power state of each controller according to the oscillation frequency of the detection result signal.

16. The power management method of claim 14, wherein the step of adjusting the oscillation frequency of the detection result signal by the power detection signal generator based on the power status signals includes: The power detection signal generator adjusts the capacitance value of a variable capacitor circuit based on these power status signals. And adjust the oscillation frequency of the detection result signal according to the capacitance value of the variable capacitor circuit.

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