System and method for training SPI monitor for high-frequency operation

Abstract

Systems and methods for training a serial peripheral interface (SPI) monitor for high- frequency operation include storing a training address in memory, comparing an address accessed by an application processor (AP) with the training address, and providing a reset or interrupt signal to the AP in response to an address match. An iterative training operation is performed to train the SPI monitor for respective SPI clock delay values for an SPI clock delay that includes adjusting, for a respective SPI clock delay value, the SPI clock delay of the SPI monitor, reading data from an external SPI flash memory, comparing the read data with a reference value, and storing a pass / fail status of the read data. A selected SPI clock delay value is determined and the SPI clock delay of the SPI monitor is set to the selected SPI clock delay value.

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