Electronic device and updating method for electronic device
Patent Information
- Application Number
- TW114108898
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-03-11
- Publication Date
- 2026-09-16
- Estimated Expiration
- 2045-03-10
AI Technical Summary
Current methods for updating code data in electronic devices, particularly in timing controllers, require disassembly and are time-consuming.
The method involves converting update code into code display data, which is then displayed in a specific area of the display unit, retrieved by the timing controller, and converted back into update code, utilizing a fast display channel for transmission.
This approach significantly reduces the update time of code data in memory circuits, allowing for quick and non-invasive updates.
Smart Images
Figure TWG2TA001075796_001 
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Figure TWG2TA001075796_003
Abstract
Description
[Technical Field]
[0001] This invention relates to an electronic device and a method for updating the electronic device. [Previous Technology]
[0002] The electronic device may have a display unit and a timing controller. The timing controller operates based on code data stored in memory, thereby controlling the display unit. When the code data is updated, the operator must disassemble the electronic device to update the code data or replace the memory. Therefore, the current update operation takes a very long time.
[0003] It can be seen that how to shorten the update time of the code data of the timing controller is one of the research focuses of those skilled in the art. [Summary of the Invention]
[0004] The present invention provides an electronic device and a method for updating the electronic device, which can shorten the update time of the code data of the timing controller.
[0005] In one embodiment of the present invention, the electronic device includes a processor, a display unit, a memory circuit, and a timing controller. When an update command is received, the processor converts the update code into code display data. The memory circuit stores the code data. The timing controller operates based on the code data. The timing controller is coupled to the processor, the memory circuit, and the display unit. When an update command is received, the timing controller generates timing corresponding to the code display data by means of a display channel between it and the processor for transmitting the code display data. The display unit displays an image corresponding to the code display data in a first specific display area using the timing of the code display data. The timing controller retrieves the code display data corresponding to the first specific display area according to the update command, converts the code display data back into update code, and uses the update code to update the code data in the memory circuit.
[0006] In one embodiment of the present invention, the update method is used in an electronic device. The electronic device includes a processor, a display unit, a memory circuit, and a timing controller. The memory circuit stores code data. The timing controller operates based on the code data. The update method includes: when an update command is received, the processor converts update code into code display data; provides the code display data to the timing controller via a display channel; the timing controller retrieves code display data corresponding to a first specific display area of the display unit according to the update command; the timing controller converts the code display data back into update code; and the timing controller uses the update code to update the code data of the memory circuit.
[0007] Based on the above, the update code is converted into code display data. The timing controller retrieves the code display data corresponding to the first specific display area of the display unit and converts the code display data back into update code. It should be noted that the display channel has a relatively fast transmission speed. In this way, the update time of the code data in the memory circuit can be significantly shortened.
Implementation Method
[0008] Some embodiments of the present invention will now be described in detail with reference to the accompanying drawings. Component symbols used in the following description are considered to be the same or similar components when they appear in different drawings. These embodiments are only a part of the present invention and do not disclose all possible implementations of the invention. More precisely, these embodiments are merely examples within the scope of the patent application of the present invention.
[0009] Please refer to FIG1, which is a schematic diagram of an electronic device according to an embodiment of the present invention. In this embodiment, the electronic device 100 includes a processor 110, a display unit 120, a memory circuit 130, and a timing controller 140. When the processor 110 receives an update command CMD, the processor 110 converts the update code UPDC into code display data IMG_UPDC. The memory circuit 130 stores the code data DS. The timing controller 140 is coupled to the processor 110, the display unit 120, and the memory circuit 130. The timing controller 140 operates based on the code data DS stored in the memory circuit 130. A display channel CHD is provided between the timing controller 140 and the processor 110 to transmit the code display data IMG_UPDC. The timing controller 140 generates timing corresponding to the code display data IMG_UPDC. The display unit 120 displays an image corresponding to the code display data IMG_UPDC in a specific display area A1 using the timing of the code display data IMG_UPDC.
[0010] In this embodiment, the timing controller 140 retrieves the code display data IMG_UPDC corresponding to a specific display area A1 according to the update command CMD. The timing controller 140 converts the code display data IMG_UPDC back to the update code UPDC, and uses the update code UPDC to update the code data DS of the memory circuit 130.
[0011] It is worth mentioning that the update code UPDC is converted into code display data IMG_UPDC and provided to the timing controller 140. The timing controller 140 retrieves the code display data IMG_UPDC corresponding to a specific display area A1 of the display unit 120 and converts the code display data IMG_UPDC back into the update code UPDC. The display channel CHD has a fast transmission speed. Therefore, the time required for the timing controller 140 to receive the update code UPDC can be significantly shortened. In this way, the update time of the code data DS of the memory circuit 130 can also be significantly shortened.
[0012] In this embodiment, the timing controller 140 receives the code display data IMG_UPDC based on the display data reception method. The timing controller 140 can receive the code display data IMG_UPDC from the processor 110 via the display channel CHD of the interface ITF. Therefore, the timing controller 140 can complete the reception of the code display data IMG_UPDC within a single frame. Therefore, without disassembling the electronic device 100, the update from receiving the update command CMD to completing the update of the code data DS can be completed quickly and easily.
[0013] For example, the update code UPDC can be a signal conforming to a bin file format (however, the present invention is not limited thereto). The processor 110 converts the update code UPDC into code display data IMG_UPDC conforming to a drawing file format. The drawing file format can be a bmp file format (however, the present invention is not limited thereto). The processor 110 may include a first signal format converter (not shown). The first signal format converter converts the update code UPDC conforming to a bin file format into code display data IMG_UPDC conforming to a bmp file format.
[0014] The timing controller 140 determines the position of a specific display area A1 based on the update command CMD, and then extracts the code display data IMG_UPDC corresponding to the position of the specific display area A1 from the display data. The timing controller 140 may include a second signal format converter (not shown). The second signal format converter converts the code display data IMG_UPDC conforming to the bmp file format into the update code UPDC conforming to the bin file format.
[0015] In this embodiment, the update command CMD is generated by the processor 110. After receiving the update command CMD, the timing controller 140 retrieves the received code display data IMG_UPDC according to the update command CMD.
[0016] In this embodiment, the electronic device 100 may be a personal computer or a laptop computer. The display unit 120, memory circuit 130, and timing controller 140 may be integrated into the display panel PL. The processor 110 may be integrated into the host computer. In some embodiments, the electronic device 100 may be a portable device with display functionality. The processor 110, display unit 120, memory circuit 130, and timing controller 140 are on the same substrate.
[0017] In this embodiment, the processor 110 is, for example, a graphics processing unit (GPU), a central processing unit (CPU), or other programmable general-purpose or special-purpose microprocessor, digital signal processor (DSP), programmable controller, application-specific integrated circuit (ASIC), programmable logic device (PLD), or other similar device or combination of these devices.
[0018] In this embodiment, the display unit 120 may be a device that provides display function, such as a liquid crystal display (LCD), a light-emitting diode (LED) display, or an organic light-emitting diode (OLED).
[0019] In this embodiment, the memory circuit 130 can be any type of data storage medium known to those skilled in the art. For example, the memory circuit 130 can be an electrically-erasable programmable read-only memory (EEPROM) or flash memory.
[0020] In this embodiment, the timing controller 140 can be implemented by any type of display controller known to those skilled in the art.
[0021] In this embodiment, during the conversion operation where the processor 110 converts the update code UPDC into code display data IMG_UPDC, the processor 110 may perform a cyclic redundancy check (CRC) operation on the update code UPDC. In some embodiments, the processor 110 may generate an error detection code based on the aforementioned CRC operation. In some embodiments, the processor 110 may convert the error detection code into error detection display data. When the processor 110 determines that the error detection display data is converted back to the error detection code incorrectly, this indicates that an error has occurred in the update code UPDC. The processor 110 may re-execute the update command CMD in the next frame period.
[0022] Please refer to Figures 1 and 2. Figure 2 is a flowchart illustrating an operation method according to an embodiment of the present invention. In this embodiment, operation method S100 is applicable to electronic device 100. Operation method S100 includes steps S110 to S150. In step S110, when an update command CMD is obtained, processor 110 converts update code UPDC into code display data IMG_UPDC. In step S120, processor 110 provides code display data IMG_UPDC to timing controller 140 via display channel CHD. In step S130, timing controller 140 retrieves code display data IMG_UPDC corresponding to a specific display area A1 according to update command CMD. In step S140, timing controller 140 converts code display data IMG_UPDC back to update code UPDC. The implementation details of steps S110 to S130 have been clearly explained in the embodiment of Figure 1, and will not be repeated here. Next, in step S150, the timing controller 140 uses the update code UPDC to update the code data DS of the memory circuit 130.
[0023] Please refer to FIG3, which is a schematic diagram of an electronic device according to an embodiment of the present invention. In this embodiment, the electronic device 200 includes a processor 210, a display unit 120, a memory circuit 130, and a timing controller 240. The processor 210 generates update code UPDC. The processor 210 converts the update code UPDC into code display data IMG_UPDC. In this embodiment, the processor 210 is connected to the timing controller 240 via an interface ITF. The interface ITF includes a display channel CHD and a communication channel CHC. The processor 210 provides the code display data IMG_UPDC to the timing controller 240 via the display channel CHD and provides the update command CMD to the timing controller 240 via the communication channel CHC.
[0024] In this embodiment, the timing controller 240 includes an acquisition circuit 241 and a register 242. The acquisition circuit 241 receives an update command CMD. The acquisition circuit 241 determines the position of a specific display area A1 according to the update command CMD and acquires the code display data IMG_UPDC corresponding to the position of the specific display area A1. In other words, the acquisition circuit 241 can acquire the code display data IMG_UPDC from the single frame display data already received by the timing controller 240 according to the update command CMD.
[0025] The timing controller 240 converts the code display data IMG_UPDC captured by the acquisition circuit 241 back into the update code UPDC, and stores the update code UPDC in the temporary register 242. The timing controller 240 uses the update code UPDC stored in the temporary register 242 to update the code data DS of the memory circuit 130.
[0026] In this embodiment, when the update of the code data DS is completed, the timing controller 240 can notify the processor 210 via the communication channel CHC that the update of the code data DS is complete. Therefore, the processor 210 can know the update result of the code data DS.
[0027] It should be noted that if the timing controller 240 receives the update code UPDC via the communication channel CHC, the timing controller 240 must spend a considerable amount of time receiving the update code UPDC. Based on the operation of receiving the update code UPDC via the communication channel CHC, the update time may take tens of seconds or even several minutes.
[0028] In this embodiment, the processor 210 converts the update code UPDC into code display data IMG_UPDC. The code display data IMG_UPDC is provided to the timing controller 240 via the display channel CHD. Therefore, the code display data IMG_UPDC can be transmitted within a single frame period. Consequently, the update from receiving the update command CMD to completing the update of the code data DS can be completed within a few seconds, or even within 4 seconds.
[0029] For example, the interface ITF can be an eDP (Embedded Display Port) or DP (Display Port) interface. Therefore, the display channel CHD can be a MainLink channel. The communication channel CHC can be an Aux channel. For example, the interface ITF can be an LVDS interface. Therefore, the display channel CHD can be an LVDS channel. The communication channel CHC can be an I2C channel.
[0030] In this embodiment, the electronic device 200 can be applied to the operation method S100 shown in FIG2.
[0031] Please refer to Figures 3 and 4. Figure 4 is a schematic diagram of a specific display area according to an embodiment of the present invention. In this embodiment, the acquisition circuit 241 obtains the position of the specific display area A1 according to the update command CMD. Further, the update command CMD represents the parameters X1, Y1, L1, and W1 of the specific display area A1 in the display area A0. The display area A0 has edges E1 and E2. Edge E2 is adjacent to edge E1. Edge E1 extends along direction D2. Edge E2 extends along direction D1. Parameter X1 represents the distance between edge E1 of display area A0 and the specific display area A1 in direction D1. Parameter Y1 represents the distance between edge E2 of display area A0 and the specific display area A1 in direction D2. Parameter L1 represents the length of the specific display area A1 in direction D1. Parameter W1 represents the length of the specific display area A1 in direction D2. Based on parameters X1, Y1, L1, and W1, the acquisition circuit 241 can determine the position (or range) of a specific display area A1. Therefore, the acquisition circuit 241 can acquire the code display data IMG_UPDC corresponding to the position of the specific display area A1 according to the parameters X1, Y1, L1, and W1.
[0032] Please refer to FIG5, which is a schematic diagram of an electronic device according to an embodiment of the present invention. In this embodiment, the electronic device 300 includes a processor 310, a display unit 120, a memory circuit 130, and a timing controller 340. The processor 310 generates update code UPDC. The processor 310 converts the update code UPDC into code display data IMG_UPDC and converts the update command CMD into command display data IMG_CMD. In this embodiment, the processor 310 is connected to the timing controller 340 via an interface ITF. The interface ITF includes a display channel CHD. The processor 310 provides the code display data IMG_UPDC and the command display data IMG_CMD to the timing controller 340 via the display channel CHD.
[0033] In this embodiment, the timing controller 340 generates timing corresponding to the code display data IMG_UPDC and timing corresponding to the command display data IMG_CMD. The display unit 120 displays an image corresponding to the code display data IMG_UPDC in a specific display area A1 using the timing of the code display data IMG_UPDC. The display unit 120 displays an image corresponding to the code display data IMG_CMD in a specific display area A2 using the timing of the command display data IMG_CMD.
[0034] In this embodiment, the timing controller 340 includes an acquisition circuit 341 and a temporary register 342. The acquisition circuit 341 acquires command display data IMG_CMD corresponding to the position of a specific display area A2. For example, at least a portion of the command display data IMG_CMD has a command identification code that the acquisition circuit 341 can recognize. The acquisition circuit 341 identifies the data corresponding to the position of the specific display area A2. Once the data corresponding to the specific display area A2 includes a command identification code, the acquisition circuit 341 acquires the command display data IMG_CMD corresponding to the position of the specific display area A2.
[0035] In this embodiment, the timing controller 340 receives the command display data IMG_CMD captured by the acquisition circuit 341. The timing controller 340 converts the command display data IMG_CMD back into an update command CMD. The timing controller 340 stores the update command CMD in the temporary register 342. Next, the acquisition circuit 341 determines the position of a specific display area A1 based on the update command CMD, and captures the code display data IMG_UPDC corresponding to the position of the specific display area A1.
[0036] The timing controller 340 converts the code display data IMG_UPDC captured by the acquisition circuit 341 back into the update code UPDC, and stores the update code UPDC in the temporary register 342. The timing controller 340 uses the update code UPDC stored in the temporary register 342 to update the code data DS of the memory circuit 130.
[0037] In this embodiment, when the update of the code data DS is completed, the timing controller 340 can control the display unit 120 to display a notification screen indicating that the update of the code data DS is complete. Therefore, the user can be informed of the update result of the code data DS. For example, when the update of the code data DS is completed, the display unit 120 is controlled to display the notification screen in an on-screen display (OSD) manner.
[0038] In this embodiment, the display channel CHD can be a MainLink channel or an LVDS channel.
[0039] In this embodiment, the electronic device 300 can be applied to the operation method S100 shown in FIG2.
[0040] Please refer to Figures 5 and 6. Figure 6 is a schematic diagram of a specific display area according to an embodiment of the present invention. In this embodiment, the capturing circuit 341 can determine the position of the specific display area A2 based on the parameters X2, Y2, L2, and W2 of the specific display area A2 in the display area A0. Parameter X2 represents the distance between the edge E1 of the display area A0 and the specific display area A2 in direction D1. Parameter Y2 represents the distance between the edge E2 of the display area A0 and the specific display area A2 in direction D2. Parameter L2 represents the length of the specific display area A2 in direction D2. Parameter W2 represents the length of the specific display area A2 in direction D2. Based on the parameters X2, Y2, L2, and W2, the capturing circuit 241 can determine the position (or range) of the specific display area A2. Therefore, the capturing circuit 241 can capture the command display data IMG_CMD corresponding to the position of the specific display area A2 based on the parameters X2, Y2, L2, and W2.
[0041] In addition, the capturing circuit 341 also obtains the position of the specific display area A1 according to the update command CMD. The update command CMD represents the parameters X1, Y1, L1, and W1 of the specific display area A1 in the display area A0. Parameter X1 represents the distance between the edge E1 of the display area A0 and the specific display area A1 in the direction D1. Parameter Y1 represents the distance between the edge E2 of the display area A0 and the specific display area A1 in the direction D2. Edge E2 is adjacent to edge E1. Parameter L1 represents the length of the specific display area A1 in the direction D1. Parameter W1 represents the length of the specific display area A1 in the direction D2. Based on the parameters X1, Y1, L1, and W1, the capturing circuit 241 can obtain the position (or range) of the specific display area A1. Therefore, the capturing circuit 241 can capture the code display data IMG_UPDC corresponding to the position of the specific display area A1 according to the parameters X1, Y1, L1, and W1.
[0042] In this embodiment, the specific display area A1 and the specific display area A2 do not overlap with each other.
[0043] In this embodiment, specific display area A1 and specific display area A2 may be adjacent or not adjacent. Specific display area A1 and specific display area A2 are arranged along direction D2. Specific display area A2 is located between specific display area A1 and edge E2. However, the present invention is not limited to the arrangement of specific display areas A1 and A2.
[0044] In summary, the update code is converted into code display data and provided to the timing controller. The timing controller retrieves the code display data corresponding to the first specific display area of the display unit and converts the code display data back into update code. The display channel has a fast transmission speed. Therefore, the time required for the timing controller to receive the code display data can be significantly shortened. In this way, the update time of the code data in the memory circuit can also be significantly shortened.
[0045] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims. [Simplified Explanation of the Diagram]
[0046] FIG1 is a schematic diagram of an electronic device according to an embodiment of the present invention. FIG2 is a flowchart of an operation method according to an embodiment of the present invention. FIG3 is a schematic diagram of an electronic device according to an embodiment of the present invention. FIG4 is a schematic diagram of a specific display area according to an embodiment of the present invention. FIG5 is a schematic diagram of an electronic device according to an embodiment of the present invention. FIG6 is a schematic diagram of a specific display area according to an embodiment of the present invention.
Claims
1. An electronic device comprising: The processor, when it receives an update command, is configured to convert the update code into code display data; Memory circuitry, configured to store code data; A timing controller, configured to operate based on the code data, is coupled to the processor, the memory circuit, and the display unit. A display channel is provided between the timing controller and the processor to transmit code display data and generate timing corresponding to the code display data. The display unit is configured to display an image corresponding to the code display data in a first specific display area using the timing of the code display data. The timing controller retrieves the code display data corresponding to the first specific display area according to the update command, converts the code display data back to the update code, and uses the update code to update the code data of the memory circuit.
2. The electronic device as claimed in claim 1, wherein the processor provides the update command to the timing controller via a communication channel.
3. The electronic device as claimed in claim 1, wherein the timing controller comprises: The capture circuit is configured to know the position of the first specific display area according to the update command, and capture the code display data corresponding to the position of the first specific display area.
4. The electronic device as claimed in claim 1, wherein the timing controller comprises: A register, wherein the timing controller stores the update code in the register and uses the update code stored in the register to update the code data of the memory circuit.
5. The electronic device as claimed in claim 2, wherein when the update of the code data is completed, the timing controller informs the processor via the communication channel that the update of the code data is complete.
6. The electronic device of claim 1, wherein the processor converts the update command into command display data and provides the code display data and the command display data to the timing controller via a display channel.
7. The electronic device as claimed in claim 6, wherein the display unit displays an image corresponding to the command display data in a second specific display area.
8. The electronic device as claimed in claim 7, wherein the first specific display area and the second specific display area do not overlap with each other.
9. The electronic device of claim 7, wherein the timing controller comprises: An acquisition circuit is configured to acquire the command display data corresponding to the position of the second specific display area, wherein the timing controller converts the command display data back into the update command, and wherein the acquisition circuit learns the position of the first specific display area based on the update command and acquires the code display data corresponding to the position of the first specific display area.
10. The electronic device of claim 6, wherein the timing controller comprises: A register, wherein the timing controller stores the update code and the update command in the register, and uses the update code stored in the register to update the code data of the memory circuit.
11. The electronic device of claim 6, wherein when the update of the code data is completed, the timing controller controls the display unit to display a notification screen indicating that the update of the code data has been completed.
12. The electronic device of claim 1, wherein in the conversion operation in which the processor converts the update code into the code display data, the processor performs a cyclic redundancy check operation on the update code to generate an error detection code, and converts the error detection code into error detection display data.
13. The electronic device of claim 12, wherein when the error detection display data is converted back to the error detection code error, the processor re-executes the update command in the next frame period.
14. A method for updating an electronic device, wherein the electronic device includes a processor, a display unit, a memory circuit, and a timing controller, wherein the memory circuit stores code data, wherein the timing controller operates based on the code data, and wherein the updating method includes: When an update command is received, the processor converts the update code into code display data; The code display data is provided to the timing controller via a display channel; the timing controller retrieves the code display data corresponding to a first specific display area of the display unit according to the update command; the timing controller converts the code display data back to the update code; and the timing controller uses the update code to update the code data of the memory circuit.
15. The update method as described in claim 14 further includes: The update command is provided to the timing controller via a communication channel.
16. The update method as described in claim 15, wherein the timing controller includes a capture circuit, wherein the step of the timing controller capturing the code display data corresponding to the first specific display area of the display unit according to the update command includes: The capturing circuit learns the position of the first specific display area according to the update command, and captures the code display data corresponding to the position of the first specific display area.
17. The update method as described in claim 15 further includes: The update command is generated by the processor; And when the update of the code data is completed, the timing controller informs the processor via the communication channel that the update of the code data is complete.
18. The update method as described in claim 14 further includes: Convert the update command into command display data; The code display data and the command display data are provided to the timing controller via the display channel.
19. The update method as described in claim 18 further includes: The command display data is displayed by the display unit in a second specific display area.
20. The update method as described in claim 19, wherein the first specific display area and the second specific display area do not overlap with each other.
21. The update method as described in claim 19, wherein the timing controller includes a capture circuit, wherein the step of the timing controller capturing the code display data corresponding to the first specific display area of the display unit according to the update command includes: The capturing circuit captures the command display data corresponding to the position of the second specific display area; The timing controller converts the command display data back into the update command; The capturing circuit learns the position of the first specific display area according to the update command and captures the code display data corresponding to the position of the first specific display area.
22. The update method as described in request item 18 further includes: When the code data update is complete, the timing controller controls the display unit to display a notification screen indicating that the code data update is complete.
23. The update method as described in claim 14 further includes: In the conversion operation of converting the updated code into the code display data, the processor performs a cyclic redundancy check operation on the updated code to generate an error detection code, and then converts the error detection code into error detection display data.
24. The update method as described in claim 23 further includes: When the error detection code is incorrect, the processor re-executes the update command in the next frame period.