Pixel circuit

Abstract

A pixel circuit includes a pulse amplitude modulation transistor, a pulse width modulation transistor, a light emitting element, a first driving circuit, and a second driving circuit. A first terminal of the pulse amplitude modulation transistor is coupled to a system high voltage, and its second terminal is coupled to a first terminal of the pulse width modulation transistor. The light emitting element is coupled between the second terminal of the pulse width modulation transistor and a system low voltage. The first driving circuit is coupled to a control terminal and the second terminal of the pulse amplitude modulation transistor and modulates a magnitude of a current according to a data voltage. The second driving circuit is coupled to the first driving circuit and modulates a timing of the current according to the data voltage and a time-varying voltage. A second terminal of a control transistor of the second driving circuit receives a first reference voltage and is turned on according to the time-varying voltage change, so that the control terminal of the pulse width modulation transistor receives the first reference voltage and is turned off.

Description

[Technical Field]

[0001] This disclosure relates to a pixel circuit. [Previous Technology]

[0002] In existing pixel circuits, if only pulse amplitude modulation circuits are used to modulate the driving current intensity flowing through the light-emitting element, the brightness produced by the light-emitting element cannot be precisely controlled. Especially when the pixel circuit is to display medium and low gray levels, even a slight change in current will cause brightness differences between pixel circuits, which is not conducive to the user's visual experience.

[0003] In addition, if the pulse amplitude modulation circuit and the pulse width modulation circuit are used to adjust the intensity and flow time of the drive current, at least two data voltage lines are required to supply their respective data voltages to the pulse amplitude modulation circuit and the pulse width modulation circuit, which not only increases the area of ​​the circuit layout, but also increases the complexity of the signal supply. [Summary of the Invention]

[0004] Therefore, embodiments of this disclosure provide a pixel circuit including a pulse amplitude modulation (PACM) crystal, a pulse width modulation (PWM) crystal, a light-emitting element, a first driving circuit, and a second driving circuit. A first terminal of the PACM is coupled to a system high voltage. A first terminal of the PWM crystal is coupled to a second terminal of the PACM. The light-emitting element is coupled between the second terminal of the PWM crystal and a system low voltage. The first driving circuit is coupled to a control terminal of the PACM and the second terminal of the PACM, and is configured to modulate the intensity of the current flowing through the light-emitting element according to the data voltage. The second driving circuit is coupled to the first driving circuit and the control terminal of the PWM crystal, and is configured to modulate the duration of the current flowing through the light-emitting element according to the data voltage and time-varying voltage. The second driving circuit includes a control crystal. The first terminal of the control transistor is coupled to the control terminal of the pulse width modulation transistor, and its second terminal receives a first reference voltage. The control transistor is turned on according to the change of the time-varying voltage, so that the control terminal of the pulse width modulation transistor receives the first reference voltage through the control transistor and turns off the pulse width modulation transistor.

[0005] According to an embodiment of the present disclosure, the first driving circuit includes a first transistor, a second transistor, a first capacitor, a third transistor, a fourth transistor, and a fifth transistor. A first terminal of the first transistor is coupled to a second terminal of the pulse amplitude modulation (PWM) transistor, and its control terminal receives a second scan signal. A first terminal of the second transistor is coupled to a second terminal of the first transistor, and its second terminal is coupled to a control terminal of the PWM transistor, and its control terminal receives the second scan signal. A first terminal of the first capacitor is coupled to a second terminal of the second transistor. A first terminal of the third transistor receives a system high voltage, its second terminal is coupled to a second terminal of the first capacitor, and its control terminal receives a third scan signal. A first terminal of the fourth transistor receives a data voltage, its second terminal is coupled to a second terminal of the third transistor, and its control terminal receives the second scan signal. A first terminal of the fifth transistor is coupled to a second terminal of the first transistor, its second terminal receives a second reference voltage, and its control terminal receives a first scan signal.

[0006] According to an embodiment of this disclosure, the second driving circuit includes a sixth transistor, a second capacitor, a seventh transistor, and a third capacitor. The first terminal of the sixth transistor receives a data voltage, and its second terminal is coupled to the control terminal of a control transistor, and its control terminal receives a second scan signal. The first terminal of the second capacitor receives a time-varying voltage, and its second terminal is coupled to the second terminal of the sixth transistor. The first terminal of the seventh transistor is coupled to the first terminal of the control transistor, its second terminal receives a third reference voltage, and its control terminal receives a light emission control signal. The first terminal of the third capacitor is coupled to the first terminal of the seventh transistor, and its second terminal is coupled to the second terminal of the seventh transistor.

[0007] According to the embodiments disclosed herein, in a first operating interval, the first transistor, the second transistor and the fifth transistor are turned on to reset the first terminal of the first capacitor and the second terminal of the pulse amplitude modulation transistor to the second reference voltage, and the fourth transistor and the sixth transistor are turned on to write the data voltage to the second terminal of the first capacitor and the second terminal of the second capacitor.

[0008] According to the embodiments disclosed herein, in the second operating interval, the first transistor, the second transistor, the fourth transistor and the sixth transistor remain on while the fifth transistor is off, and the potential of the control terminal of the pulse amplitude modulation transistor is compensated to the system high voltage minus the critical voltage of the pulse amplitude modulation transistor.

[0009] According to the embodiments disclosed herein, in the third operating interval, the third transistor and the seventh transistor are turned on while the first transistor, the second transistor, the fourth transistor, the fifth transistor, and the sixth transistor are turned off. The system high voltage is written to the second terminal of the first capacitor. The voltage difference between the data voltage and the system high voltage is coupled to the control terminal of the pulse amplitude modulation transistor through the first capacitor. The control terminal of the pulse width modulation transistor receives the third reference voltage and is turned on, so that current flows through the light-emitting element.

[0010] According to the embodiments disclosed herein, in the fourth operating interval, the third transistor is turned on and the first transistor, second transistor, fourth transistor, fifth transistor, sixth transistor and seventh transistor are turned off, and the control terminal of the pulse width modulation transistor is maintained at the third reference voltage by the third capacitor, so that the pulse width modulation transistor is turned on and the current flowing through the light-emitting element is maintained.

[0011] According to the embodiments disclosed herein, in the fifth operating interval, the voltage of the time-varying voltage coupled to the control terminal of the control transistor via the second capacitor is sufficient to turn on the control transistor, causing the control terminal of the pulse width modulation transistor to change from the third reference voltage to the first reference voltage and turn off the pulse width modulation transistor.

[0012] According to the embodiments disclosed herein, the time-varying voltage is a ramp signal, which causes the second driving circuit to modulate the time of the current flowing through the light-emitting element according to the linear variation speed of the data voltage and the ramp signal.

[0013] According to the embodiments disclosed herein, the time-varying voltage is a stepped wave signal, which causes the second driving circuit to modulate the time of the current flowing through the light-emitting element according to the voltage level of the data voltage and the stepped wave signal.

Implementation Method

[0014] The following disclosure provides many different embodiments or examples for implementing different features of the provided invention. The embodiments of components and configurations described below are merely examples and are not intended to be limiting. Furthermore, for simplicity and clarity, reference numerals and / or numbers are repeated in the examples, but this does not in itself limit the relationship between the various embodiments and / or components discussed.

[0015] Please refer to Figure 1, which is a schematic diagram of the pixel circuit 100 according to an embodiment of the present invention. The pixel circuit 100 includes a pulse amplitude modulation crystal TA, a pulse width modulation crystal TP, a light-emitting element LED, a first driving circuit 110, and a second driving circuit 120.

[0016] The first driving circuit 110 is coupled to the control terminal and the second terminal of the pulse amplitude modulation transistor TA, and is configured to receive the data voltage Data. The second driving circuit 120 is coupled to the control terminal of the first driving circuit 110 and the pulse width modulation transistor TP, and is configured to receive the data voltage Data, the time-varying voltage Sweep, and the first reference voltage PH. In an embodiment of the present invention, the first driving circuit 110 is a pulse amplitude modulation circuit and is configured to modulate the current intensity flowing through the light-emitting element LED according to the data voltage Data, while the second driving circuit 120 is a pulse width modulation circuit and is configured to modulate the current duration flowing through the light-emitting element LED according to the data voltage Data, the first reference voltage PH, and the time-varying voltage Sweep.

[0017] It is worth noting that the first driving circuit 110 and the second driving circuit 120 share the same data voltage Data, so as to simultaneously modulate the current intensity (e.g., the height of the current signal) and the current flow time (e.g., the width of the current signal) flowing through the light-emitting element LED through the same data voltage Data. In this way, not only can the problem of uneven pixel brightness caused by current changes be improved in medium and low grayscale applications, but also the increase in circuit layout area and the increase in signal supply complexity can be avoided.

[0018] In detail, the second driving circuit 120 includes a control transistor TC, whose first terminal (not shown in FIG1) is coupled to the control terminal of a pulse width modulation (PWM) transistor TP, and whose second terminal (not shown in FIG1) receives a first reference voltage PH. Its control terminal (not shown in FIG1) is controlled by a time-varying voltage Sweep. The control transistor TC is turned on according to the changes in the time-varying voltage Sweep and the data voltage Data, so that the control transistor TC transmits the first reference voltage PH connected to its second terminal to the control terminal of the PWM transistor TP, thereby turning off the PWM transistor TP. Thus, by controlling the on and off of the PWM transistor TP, the time for current to flow through the light-emitting element LED can be regulated.

[0019] In some embodiments, the time-varying voltage Sweep is a ramp signal, and the time-varying voltage Sweep changes linearly with time. For example, when the control transistor TC is a P-type transistor, the time-varying voltage Sweep decreases linearly with time until the voltage at the control terminal of the control transistor TC is low enough to turn on the control transistor TC; when the control transistor TC is an N-type transistor, the time-varying voltage Sweep increases linearly with time until the voltage at the control terminal of the control transistor TC is high enough to turn on the control transistor TC.

[0020] In such an embodiment, the rate of change of the time-varying voltage Sweep (e.g., the rate of linear decrease) can be used to control the turn-on timing of the transistor TC, thereby controlling the turn-off timing of the pulse width modulation transistor TP, so that the duration of current flowing through the light-emitting element LED can be regulated.

[0021] In some embodiments, the time-varying voltage Sweep is a stepped wave signal, and the time-varying voltage Sweep changes in a stepped manner over time. For example, when the control transistor TC is a P-type transistor, the time-varying voltage Sweep drops from the original voltage level to a first voltage level at a first time point, and drops from the first voltage level to a second voltage level at a second time point, and so on, until the voltage difference between the time-varying voltage Sweep and the data voltage Data is low enough to turn on the control transistor TC; when the control transistor TC is an N-type transistor, the time-varying voltage Sweep rises from the original voltage level to a first voltage level at a first time point, and rises from the first voltage level to a second voltage level at a second time point, and so on, until the voltage difference between the time-varying voltage Sweep and the data voltage Data is high enough to turn on the control transistor TC.

[0022] In such an embodiment, the order of the voltage level variation of the time-varying voltage Sweep can be used to control the turn-on timing of the transistor TC (e.g., dividing the voltage level into more levels to increase the time during which the transistor TC is kept off; or increasing the duration of each voltage level to increase the time during which the transistor TC is kept off), thereby controlling the turn-off timing of the pulse width modulation transistor TP, so that the duration of current flowing through the light-emitting element LED can be regulated.

[0023] Please refer to Figure 2, which is a schematic diagram of the internal architecture of the pixel circuit 100 according to an embodiment of the present invention. The first driving circuit 110 includes a first transistor T1, a second transistor T2, a first capacitor C1, a third transistor T3, a fourth transistor T4, and a fifth transistor T5. The second driving circuit 120 includes a control transistor TC, a sixth transistor T6, a second capacitor C2, a seventh transistor T7, and a third capacitor C3.

[0024] The first terminal of the first transistor T1 is coupled to the second terminal of the pulse amplitude modulation transistor TA, and its control terminal receives the second scan signal S2. The first terminal of the second transistor T2 is coupled to the second terminal of the first transistor T1, and its second terminal is coupled to the control terminal of the pulse amplitude modulation transistor TA, and its control terminal receives the second scan signal S2. The first terminal of the first capacitor C1 is coupled to the second terminal of the second transistor T2 and the control terminal of the pulse amplitude modulation transistor TA.

[0025] The first terminal of the third transistor T3 receives the system high voltage VDD, its second terminal is coupled to the second terminal of the first capacitor C1, and its control terminal receives the third scan signal S3. The first terminal of the fourth transistor T4 receives the data voltage Data, its second terminal is coupled to the second terminal of the third transistor T3, and its control terminal receives the second scan signal S2. The first terminal of the fifth transistor T5 is coupled to the second terminal of the first transistor T1 and the first terminal of the second transistor T2, its second terminal receives the second reference voltage Vn, and its control terminal receives the first scan signal S1.

[0026] The first terminal of the sixth transistor T6 receives the data voltage Data, and its second terminal is coupled to the control terminal of the control transistor TC, and its control terminal receives the second scan signal S2. The first terminal of the second capacitor C2 receives the time-varying voltage Sweep, and its second terminal is coupled to the second terminal of the sixth transistor T6. The first terminal of the seventh transistor T7 is coupled to the first terminal of the control transistor TC, its second terminal receives the third reference voltage PL, and its control terminal receives the light emission control signal EMS. The first terminal of the third capacitor C3 is coupled to the first terminal of the seventh transistor T7, and its second terminal is coupled to the second terminal of the seventh transistor T7 and the third reference voltage PL.

[0027] Please refer to Figure 3, which is a timing diagram of the drive signals of the pixel circuit 100 according to an embodiment of the present invention. The present invention can be better understood by referring to the operation diagrams of the pixel circuit 100 in Figures 4 to 8, which illustrate its operation in the first operation interval t1, the second operation interval t2, the third operation interval t3, the fourth operation interval t4, and the fifth operation interval t5, respectively. In Figures 4 to 8, transistors marked with an "X" represent the off state, and transistors without an "X" represent the on state.

[0028] In the following exemplary embodiment, the supply voltages are ordered from largest to smallest as follows: system high voltage VDD = first reference voltage PH > system low voltage VSS = second reference voltage Vn > third reference voltage PL.

[0029] In the first operating interval t1, corresponding to the reset and data voltage writing interval shown in Figure 4, the first transistor T1, the second transistor T2, the fourth transistor T4, and the sixth transistor T6 are turned on according to the low logic level of the second scan signal S2, while the fifth transistor T5 is turned on according to the low logic level of the first scan signal S1. The third transistor T3 is turned off according to the high logic level of the third scan signal S3, and the seventh transistor T7 is turned off according to the high logic level of the light emission control signal EMS. The pulse width modulation transistor TP and the control transistor TC are also in the off state.

[0030] The first terminal of the first capacitor C1, the control terminal of the pulse amplitude modulation transistor TA, and the second terminal are reset to the second reference voltage Vn due to the conduction of the first transistor T1, the second transistor T2, and the fifth transistor T5. The second terminal of the first capacitor C1 and the second terminal of the second capacitor C2 are written with the data voltage Data due to the conduction of the fourth transistor T4 and the sixth transistor T6. At this point, the reset steps for each node of the pixel circuit 100 are complete.

[0031] In the second operating interval t2, corresponding to the compensation and data voltage writing interval shown in Figure 5, the first transistor T1, the second transistor T2, the fourth transistor T4, and the sixth transistor T6 remain on according to the low logic level of the second scan signal S2. The third transistor T3 is off according to the high logic level of the third scan signal S3, the fifth transistor T5 is off according to the high logic level of the first scan signal S1, and the seventh transistor T7 is off according to the high logic level of the light emission control signal EMS. The pulse width modulation transistor TP and the control transistor TC are also off.

[0032] The conduction of the first transistor T1 and the second transistor T2 causes the pulse amplitude modulation transistor TA to form a diode connection, thereby compensating for the critical voltage VTH_TA of the pulse amplitude modulation transistor TA. During this second operating interval t2, the potential at the control terminal of the pulse amplitude modulation transistor TA is compensated to the system high voltage VDD minus the critical voltage VTH_TA of the pulse amplitude modulation transistor TA. At this point, the gate compensation step of the pulse amplitude modulation transistor TA in the pixel circuit 100 is completed.

[0033] In the third operating interval t3, corresponding to the first light-emitting interval shown in Figure 6, the first transistor T1, the second transistor T2, the fourth transistor T4, and the sixth transistor T6 are turned off according to the high logic level of the second scan signal S2, while the fifth transistor T5 is turned off according to the high logic level of the first scan signal S1. The third transistor T3 is turned on according to the low logic level of the third scan signal S3, and the seventh transistor T7 is turned on according to the low logic level of the light-emitting control signal EMS, while the control transistor TC remains in the off state.

[0034] The control terminal of the pulse width modulation transistor TP is written with the third reference voltage PL due to the conduction of the seventh transistor T7, which enables the pulse width modulation transistor TP to conduct. The second terminal of the first capacitor C1 is written with the system high voltage VDD due to the conduction of the third transistor T3, which causes the potential of the control terminal of the pulse amplitude modulation transistor TA to change through the coupling effect of the first capacitor C1 to ().

[0035] Based on the potentials of the above nodes, the current ID flowing through the light-emitting element LED can be expressed as: where is the carrier mobility, is the unit capacitance of the gate oxide layer, is the gate width, and is the gate length. The aforementioned parameters depend on the process parameters of the pulse amplitude modulation crystal TA and vary depending on the type of pulse amplitude modulation crystal TA selected.

[0036] In the fourth operating interval t4, corresponding to the second light-emitting interval shown in Figure 7, the first transistor T1, the second transistor T2, the fourth transistor T4, and the sixth transistor T6 are turned off according to the high logic level of the second scan signal S2, the fifth transistor T5 is turned off according to the high logic level of the first scan signal S1, and the seventh transistor T7 is turned off according to the high logic level of the light-emitting control signal EMS. The third transistor T3 is continuously turned on according to the low logic level of the third scan signal S3, the control transistor TC remains in the off state, and the pulse width modulation transistor TP remains in the on state.

[0037] Although the seventh transistor T7 is turned off due to the high logic level of the light-emitting control signal EMS, the control terminal of the pulse width modulation transistor TP is maintained at the third reference voltage PL due to the voltage regulation of the third capacitor C3, so that the pulse width modulation transistor TP continues to conduct and maintains the current flowing through the light-emitting element LED. In the embodiment where the time-varying voltage Sweep is a stepped wave, the time-varying voltage Sweep drops from the original voltage level to the first voltage level, and the voltage at the control terminal of the control transistor TC drops accordingly due to the coupling effect of the second capacitor C2.

[0038] It is worth noting that during the fourth operating interval t4, the decrease in the time-varying voltage Sweep is still not low enough to turn on the control transistor TC. Therefore, the potential at the control terminal of the pulse width modulation transistor TP remains at the third reference voltage PL, so that the pulse width modulation transistor TP continues to be turned on and current flows through it to the light-emitting element LED.

[0039] In the fifth operating interval t5, corresponding to the non-emitting interval shown in Figure 8, the first transistor T1, the second transistor T2, the fourth transistor T4, and the sixth transistor T6 are turned off according to the high logic level of the second scan signal S2; the fifth transistor T5 is turned off according to the high logic level of the first scan signal S1; and the seventh transistor T7 is turned off according to the high logic level of the emission control signal EMS. The third transistor T3 remains on according to the low logic level of the third scan signal S3. The control transistor TC changes from the off state to the on state, while the pulse width modulation transistor TP changes from the on state to the off state.

[0040] In the fifth operating interval t5, since the time-varying voltage Sweep has dropped from the first voltage level to the second voltage level, the voltage coupled to the control terminal of the control transistor TC via the second capacitor C2 is sufficient to turn on the control transistor TC. At this time, the first reference voltage PH is transmitted to the control terminal of the pulse width modulation transistor TP via the turned-on control transistor TC, causing the control terminal of the pulse width modulation transistor TP to change from the third reference voltage PL to the first reference voltage PH, thus turning off the pulse width modulation transistor TP. At this point, current no longer flows through the light-emitting element LED. Thus, the driving steps of the pixel circuit 100 are largely completed.

[0041] In summary, the pixel circuit of this invention integrates a pulse width modulation (PWM) circuit and a pulse amplitude modulation (PAM) circuit to simultaneously control the current intensity and duration flowing through the light-emitting element. This allows for more accurate current control and improves the problem of uneven pixel brightness in medium and low grayscale applications. The PWM circuit includes a control transistor coupled to the PWM transistor, which automatically switches the PWM transistor to an off state via a time-varying voltage mechanism, thereby controlling the duration of current flow through the light-emitting element. Furthermore, the PWM circuit and the PAM circuit share the same data voltage, avoiding an increase in circuit layout area, reducing the pixel circuit's footprint, and eliminating the need to supply multiple signals, thus simplifying the application.

[0042] Although the present invention has been disclosed above with various embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims. [Simplified Explanation of the Diagram]

[0043] To make the above and other features, advantages and embodiments of the present invention more readily understood, the accompanying drawings are described as follows: FIG1 is a schematic diagram of a pixel circuit according to an embodiment of the present invention; FIG2 is a schematic diagram of the internal architecture of a pixel circuit according to an embodiment of the present invention; FIG3 is a timing diagram of the drive signals of a pixel circuit according to an embodiment of the present invention; FIG4 is an operational schematic diagram of a pixel circuit operating in a first operating range according to an embodiment of the present invention; FIG5 is an operational schematic diagram of a pixel circuit operating in a second operating range according to an embodiment of the present invention; FIG6 is an operational schematic diagram of a pixel circuit operating in a third operating range according to an embodiment of the present invention; FIG7 is an operational schematic diagram of a pixel circuit operating in a fourth operating range according to an embodiment of the present invention; and FIG8 is an operational schematic diagram of a pixel circuit operating in a fifth operating range according to an embodiment of the present invention.

Claims

1. A pixel circuit comprising: a pulse amplitude modulation (PAM) crystal, a first terminal of which is coupled to a system high voltage; a pulse width modulation (PWM) crystal, a first terminal of which is coupled to a second terminal of the PAM crystal; a light-emitting element coupled between the second terminal of the PWM crystal and a system low voltage; and a first driving circuit coupled to a control terminal of the PWM crystal and the second terminal of the PWM crystal, and configured to modulate the intensity of a current flowing through the light-emitting element according to a data voltage, wherein the first driving circuit comprises: A first transistor, the first terminal of which is coupled to the second terminal of the pulse width modulation transistor, and the control terminal of which receives a second scan signal; and a second transistor, the first terminal of which is coupled to the second terminal of the first transistor, the second terminal of which is coupled to the control terminal of the pulse width modulation transistor, and the control terminal of which receives the second scan signal; and a second driving circuit, coupled to the first driving circuit and the control terminal of the pulse width modulation transistor, and configured to modulate the time of the current flowing through the light-emitting element according to the data voltage and a time-varying voltage, the second driving circuit comprising: a control transistor, the first terminal of which is coupled to the control terminal of the pulse width modulation transistor, and the second terminal of which receives a first reference voltage, wherein the control transistor is turned on according to the change of the time-varying voltage, so that the control terminal of the pulse width modulation transistor receives the first reference voltage through the control transistor and turns off the pulse width modulation transistor.

2. The pixel circuit as claimed in claim 1, wherein the first driving circuit further comprises: a first capacitor, the first terminal of which is coupled to the second terminal of the second transistor; a third transistor, the first terminal of which receives a system high voltage, the second terminal of which is coupled to the second terminal of the first capacitor, and the control terminal of which receives a third scan signal; a fourth transistor, the first terminal of which receives the data voltage, the second terminal of which is coupled to the second terminal of the third transistor, and the control terminal of which receives the second scan signal; and a fifth transistor, the first terminal of which is coupled to the second terminal of the first transistor, the second terminal of which receives a second reference voltage, and the control terminal of which receives a first scan signal.

3. The pixel circuit as described in claim 2, wherein the second driving circuit comprises: a sixth transistor having a first terminal receiving the data voltage, a second terminal coupled to a control terminal of the control transistor, and the control terminal receiving the second scan signal; a second capacitor having a first terminal receiving the time-varying voltage, and a second terminal coupled to the second terminal of the sixth transistor; a seventh transistor having a first terminal coupled to the first terminal of the control transistor, a second terminal receiving a third reference voltage, and the control terminal receiving a light emission control signal; and a third capacitor having a first terminal coupled to the first terminal of the seventh transistor, and a second terminal coupled to the second terminal of the seventh transistor.

4. The pixel circuit as claimed in claim 3, wherein in a first operating interval, the first transistor, the second transistor, and the fifth transistor are turned on to reset the first terminal of the first capacitor and the second terminal of the pulse amplitude modulation transistor to the second reference voltage, and wherein the fourth transistor and the sixth transistor are turned on to write the data voltage to the second terminal of the first capacitor and the second terminal of the second capacitor.

5. The pixel circuit as claimed in claim 4, wherein in the second operating interval, the first transistor, the second transistor, the fourth transistor, and the sixth transistor remain on while the fifth transistor is off, and the potential of the control terminal of the pulse amplitude modulation transistor is compensated to the system high voltage minus a critical voltage of the pulse amplitude modulation transistor.

6. The pixel circuit as described in claim 5, wherein in the third operating interval, the third transistor and the seventh transistor are turned on and the first transistor, the second transistor, the fourth transistor, the fifth transistor, and the sixth transistor are turned off, the system high voltage is written to the second terminal of the first capacitor, the voltage difference between the data voltage and the system high voltage is coupled to the control terminal of the pulse amplitude modulation transistor through the first capacitor, and the control terminal of the pulse width modulation transistor receives the third reference voltage and is turned on, so that the current flows through the light-emitting element.

7. The pixel circuit as claimed in claim 6, wherein in the fourth operating interval, the third transistor is turned on and the first transistor, the second transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor are turned off, and wherein the control terminal of the pulse width modulation transistor is maintained at the third reference voltage by the third capacitor, thereby turning on the pulse width modulation transistor to maintain the current flowing through the light-emitting element.

8. The pixel circuit as claimed in claim 7, wherein in the fifth operating interval, the voltage of the time-varying voltage coupled to the control terminal of the control transistor via the second capacitor is sufficient to turn on the control transistor, causing the control terminal of the pulse width modulation transistor to change from the third reference voltage to the first reference voltage and turn off the pulse width modulation transistor.

9. The pixel circuit as claimed in claim 1, wherein the time-varying voltage is a ramp signal, and the second driving circuit modulates the time of the current flowing through the light-emitting element according to the linearly varying speed of the data voltage and the ramp signal.

10. The pixel circuit as claimed in claim 1, wherein the time-varying voltage is a stepped wave signal, and the second driving circuit modulates the time of the current flowing through the light-emitting element according to the voltage level of the data voltage and the stepped wave signal.

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