Semiconductor memory devices and their manufacturing methods

TW202638733APending Publication Date: 2026-09-16KIOXIA CORP
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Patent Information

Application Number
TW114132859
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-03-14
Filing Date
2025-08-28
Publication Date
2026-09-16

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Abstract

An embodiment provides a memory that can suppress the formation of seams in slits or holes of a cell array. The semiconductor memory device of this embodiment includes a first stack body in which a first conductive layer and a first insulating layer are alternately stacked in a first direction. A columnar body is included within the first stack body, extending a semiconductor layer in the first direction. A second insulating layer is disposed on the inner wall of a slit extending in a second direction through the first stack body, or a hole through an interlayer insulating film. A first nucleation layer is disposed within the slit or hole, inside the second insulating layer. A second nucleation layer is disposed within the slit or hole, inside the first nucleation layer. A film-forming inhibition layer is disposed within the slit or hole, inside the second nucleation layer. A conductive material is embedded within the slit or hole, inside the film-forming inhibition layer. The second nucleation layer has a longer film-forming time than the first nucleation layer for growing conductive material of the same thickness.
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