Memory system

Abstract

The purpose of this invention is to improve the durability of write / erase cycles. According to an embodiment, a memory system includes a memory device and a memory controller. The memory device includes: a memory cell array comprising a plurality of memory cells respectively connected to a plurality of word lines, a plurality of bit lines, and a group of one word line and one bit line; and a first circuit that, during a read operation of the first memory cell, samples a first voltage based on leakage current flowing in the first bit line connected to the first memory cell. The memory controller includes: a second circuit that manages information related to the first voltage and, during a write operation, selects an address of the memory cell array based on the information.

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