Semiconductor packages and methods of forming

TW202638961APending Publication Date: 2026-09-16TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
TW114133331
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-07-08
Filing Date
2025-09-01
Publication Date
2026-09-16

Smart Images

  • Figure TWG2TA001076254_001
    Figure TWG2TA001076254_001
  • Figure TWG2TA001076254_002
    Figure TWG2TA001076254_002
  • Figure TWG2TA001076254_003
    Figure TWG2TA001076254_003
Patent Text Reader

Abstract

A semiconductor package includes a substrate and a semiconductor structure attached to the substrate, where the semiconductor structure includes: an interposer; a die attached to a first side of the interposer distal from the substrate; a first encapsulant material on the first side of the interposer around the die; and conductive bumps at a second side of the interposer facing the substrate. The semiconductor package further includes: a second encapsulant material on the substrate around the semiconductor structure, where there is a cavity in the second encapsulant material over the semiconductor structure, wherein a first side of the semiconductor structure distal from the substrate is exposed at a bottom of the cavity; a thermal interface material (TIM) in the cavity and attached to the first side of the semiconductor structure; and a heat spreader over and attached to the TIM.
Need to check novelty before this filing date? Find Prior Art