Semiconductor memory devices

Abstract

A semiconductor memory device capable of miniaturizing chip size is provided. The semiconductor memory device of this embodiment includes a plurality of memory planes and a first pillar electrode. Each of the plurality of memory planes has one or more blocks. The first pillar electrode is disposed in a first region and extends in a first direction slightly perpendicular to the memory planes; the first region is a portion of a plurality of regions between two memory planes.

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