Engineered substrate, high electron mobility transistor and photonic integrated circuit structure

Abstract

An engineered substrate includes a core substrate, a dielectric material layer, a bonding material layer, and a semiconductor material layer. The core substrate is composed of silicon carbide or glass. The dielectric material layer wraps around a portion of side surfaces of the core substrate, and is in direct contact with the core substrate. The bonding material layer is disposed on the dielectric material layer. The semiconductor material layer is disposed on the bonding material layer. In addition, a high electron mobility transistor or a silicon photonic integrated circuit structure is fabricated on the engineered substrate.

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