System and method for overlay error detection

TW202640103APending Publication Date: 2026-10-01TOKYO ELECTRON LTD
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Patent Information

Application Number
TW115101578
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-04-28
Filing Date
2026-01-15
Publication Date
2026-10-01

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Abstract

A method is provided for overlay error detection in a bonded wafer. The method includes receiving a bonded wafer in a bonding chamber, where the bonded wafer includes a first structure bonded to a second structure at a bonding interface. The first structure includes first overlay targets aligned with second overlay targets of the second structure at the bonding interface. The method further includes illuminating a first light beam onto a first portion of the bonded wafer for a first time duration that includes a start time. A light detector is used to detect a first temperature map of a region of the bonded wafer around the first portion illuminated by the first light beam, with the first temperature map being detected after the start time for a second time duration. Based on the first temperature map, an overlay error at the bonding interface is determined from misalignment between the first overlay targets and the second overlay targets.
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