Photomask, method of and processing device for generating layout diagram

TW202640292APending Publication Date: 2026-10-01TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information

Application Number
TW114118076
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-03-28
Filing Date
2025-05-14
Publication Date
2026-10-01

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Abstract

A method of generating a layout diagram for a layer of a semiconductor device includes obtaining an initial layout diagram that includes a first set of layout patterns of the layout diagram indicative of a first set of elements of the layer of the semiconductor device, the first set of elements being mappable to a circuit design of the semiconductor device. The method includes placing a second set of layout patterns of the layout diagram indicative of a second set of elements of the layer of the semiconductor device, the second set of elements not being mappable to the circuit design of the semiconductor device. Each one of the second set of layout patterns has a freeform shape that corresponds to having an irregular contour, being asymmetrical, or both.
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