Multiply accumulate circuit, accelerator device and multiply accumulate circuit operating method

Abstract

Memory devices, circuits, and a method of operating the same are disclosed. In one aspect, a multiply-accumulate (MAC) circuit includes one or more circuits. The one or more circuits can receive a first operand and a second operand formatted according to a logarithm number system, and generate a plurality of sums based on the first operand and the second operand. The one or more circuits can determine a plurality of exponential values using a fraction portion of the plurality of sums. The one or more circuits can generate a mantissa portion for a floating-point value based on the exponential values, and generate an exponent portion for the floating-point value based on an integer portion of the plurality of sums. The one or more circuits can provide the floating-point value as output.

Images