Sense amplifier for a flash memory system

Abstract

In one example, a method comprises generating a first voltage; generating a second voltage; prior to a read operation, charging a first node and a third node to the first voltage and charging a second node and a fourth node to the second voltage, wherein a first capacitor couples the first node and the second node and a second capacitor couples the third node and the fourth node; and during the read operation, discharging the first node through a reference memory cell and discharging the third node through a selected memory cell, wherein the second node tracks the first node through the first capacitor and the fourth node tracks the second node through the second capacitor.

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