Memory device

Abstract

In this invention, a plurality of transistors supply a first potential to the first and second inputs of a sensing amplifier circuit based on a first signal. A first wiring is connected to the first input. A second wiring is connected to the second input. A first memory cell includes a first cell transistor and a first cell capacitor connected in series. A first select transistor is connected between the first wiring and the first memory cell. A second memory cell includes a second cell transistor and a second cell capacitor connected in series. A second select transistor is connected between the second wiring and the second memory cell. A first operation is performed to increase the gate potential of the first select transistor. After the first operation, a second operation is performed to decrease the potential of the first signal. After the second operation, a third operation is performed, which is to increase the gate potential of the first cell transistor and increase the gate potential of the second select transistor.

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