Flexible clock allocation for program-verify operations

Abstract

The present disclosure provides for performing program-verify operations of a memory device. The memory device includes a memory block that includes a plurality of memory cells that are connected to a plurality of data word lines. The memory device also includes circuitry that is configured to conduct a first operation of the program-verify operation to verify a threshold voltage of one or more memory cells connected to a selected data word line of the plurality of data word lines is above a verify low voltage. The circuitry is also configured to, during the first operation, apply a programming voltage to the selected data word line. In some examples, the first operation can be a lockout low bit-scan.

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