Memory system and reading methods
TW202640629APending Publication Date: 2026-10-01KIOXIA CORP
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Patent Information
- Application Number
- TW114118492
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-03-21
- Filing Date
- 2025-05-16
- Publication Date
- 2026-10-01
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Figure TWG2TA001078146_001 
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Abstract
A memory system and a reading method for improving read performance are provided. The memory system in the embodiment includes a controller connected to non-volatile memory. When the data retention pressure exceeds a threshold value, the controller uses a first read voltage to read data, corrects errors in the read data, and detects the number of bits read in the first read. When the error cannot be corrected, the controller calculates a shift candidate value based on the number of bits read in the first read, and performs multiple reads using a second read voltage that shifts the first read voltage according to the shift candidate value, and a third read voltage that further shifts the second read voltage by at least one bit. Based on the changes in the number of bits read in the second read detected by the multiple reads, a fourth read voltage is determined, and the fourth read voltage is used to read data.
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