Stacked capacitor packaging structure and method of manufacturing the same, and electronic device

TW202640670APending Publication Date: 2026-10-01AIPAQ TECH CO LTD
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Patent Information

Application Number
TW115107729
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-03-20
Publication Date
2026-10-01

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    Figure TWG2TA001079440_003
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Abstract

The present invention provides a stacked capacitor packaging structure and a method of manufacturing the same, and an electronic device. The stacked capacitor packaging structure includes a capacitor unit, an insulating package body and a terminal electrode structure. The capacitor unit includes a plurality of capacitor elements. The insulating package body is configured to partially enclose the capacitor elements. The terminal electrode structure includes a first electrode structure layer and a second electrode structure layer. The positive electrode portions of the capacitor elements are separated from each other by a predetermined distance, and the negative electrode portions of the capacitor elements are stacked in sequence to provide a common negative electrode structure. The positive side surface of the positive electrode portion of each capacitor element is exposed by the first side portion of the insulating package body, thereby directly electrically connecting to the first electrode structure layer. The at least one negative side surface of the common negative electrode structure is exposed by the second side portion of the insulating package body, thereby directly electrically connecting to the second electrode structure layer.
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