High step-up DC-DC converter
Patent Information
- Application Number
- TW114110443
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-03-20
- Publication Date
- 2026-10-01
- Estimated Expiration
- 2045-03-19
AI Technical Summary
Existing boost DC-DC converters in renewable energy systems face limitations in achieving high voltage gain and efficiency due to parasitic components and high voltage stress on switches and diodes, leading to increased conduction losses and reduced practicality.
A high-boost DC-DC converter incorporating a voltage multiplier module with clamping circuits and coupling inductors, allowing for high voltage gain without extreme duty ratios, and utilizing low-rated MOSFETs and diodes to reduce stress and conduction losses.
The converter achieves high voltage gain with reduced stress on switches and diodes, enabling efficient power conversion and improved maximum power point tracking efficiency, while extending battery life and reducing power losses.
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Abstract
Description
[Technical Field]
[0001] This invention relates to a high-boost DC-DC converter, particularly a converter with high voltage gain and high efficiency that can be applied to power conversion in renewable energy systems. It utilizes voltage boosting technology, incorporates clamping circuits and coupling inductors to create a voltage multiplication module, achieving high voltage gain and reducing voltage stress on switches and diodes, thus enhancing its overall practicality. [Previous Technology]
[0002] Note: In response to global warming, reducing greenhouse gas emissions is a key strategy. To achieve the "net-zero emissions by 2050" goal, the application of renewable energy is an energy policy actively promoted by various countries. In renewable energy power systems, the output voltage generated by solar cells and fuel cell modules is low. To meet the needs of grid-connected power generation, a high-boost DC-DC converter must be used to boost the low voltage to the high voltage of the busbar to meet the needs of the subsequent DC-AC inverter. In terms of DC boost, existing boost DC-DC converters can achieve high voltage gain through a very high duty ratio; however, in actual circuits, due to the influence of parasitic components (such as the equivalent series resistance of inductors), the practical voltage gain is limited by the operation of extremely high duty ratios, and the efficiency is also poor.
[0003] Furthermore, in terms of power loss considerations for semiconductor components, the voltage stress on the power switches and diodes of existing boost converters is the output voltage. Generally speaking, MOSFETs with high rated voltage have higher on-resistance RDS(ON), resulting in high conduction losses; diodes with high rated voltage have higher forward conduction voltage drops, which also cause high conduction losses. Both of these factors have an adverse effect on the efficiency of the converter.
[0004] In view of this, the inventor, based on years of rich design, development and practical manufacturing experience in the relevant industry, has further researched and improved the existing structure and its shortcomings, and provides a high boost DC-DC converter in order to achieve better practical value. [Summary of the Invention]
[0005] The main objective of this invention is to provide a high-boost DC-DC converter, which features high voltage gain and high efficiency. It can be applied to power conversion in renewable energy systems. By utilizing voltage boosting technology and incorporating a voltage multiplier module with clamping circuitry and coupling inductor technology, it achieves high voltage gain and reduces voltage stress on switches and diodes. In terms of application, the introduction of the voltage multiplier module increases the design freedom of the voltage gain due to the increased turns ratio of the coupling inductor. Therefore, the converter does not need to operate at a maximum conduction ratio to achieve high voltage gain. The leakage inductance energy of the coupling inductor can be recovered, eliminating the problem of switching voltage surges. The low voltage stress on the switches allows the use of MOSFETs with lower rated voltage and lower on-resistance, reducing conduction losses. The low voltage stress on the diodes allows the use of diodes with lower rated voltage and lower forward voltage drop, reducing conduction losses. Appropriate design of the input inductor value can make the input current continuous and reduce input current ripple, which helps improve the maximum power point tracking efficiency of solar cells and extend battery life. In terms of overall implementation and use, it enhances practicality and effectiveness.
Implementation Method
[0006] To provide a more complete and clear disclosure of the technical content, inventive purpose, and effects achieved by this invention, a detailed description is provided below, and please refer to the accompanying drawings and figures:
[0007] First, please refer to the circuit diagram of the present invention in Figure 1 and the equivalent circuit diagram of the present invention in Figure 2. The converter (1) of the present invention is mainly connected to the first terminal of the input inductor at the positive terminal of the input voltage. The second terminal of the input inductor is connected to the first terminal of the voltage boost capacitor, the positive terminal of the clamping diode and the first terminal of the power switch. The second terminal of the voltage boost capacitor is connected to the first terminal of the primary side of the coupling inductor, the positive terminal of the first voltage doubler diode and the first terminal of the first voltage doubler capacitor. The first terminal of the primary side of the coupling inductor is a non-dot terminal. The primary side of the coupling inductor is connected in parallel with a magnetizing inductor and a leakage inductor. The second terminal of the primary side of the coupling inductor is connected to the negative terminal of the clamping diode and the first terminal of the clamping capacitor. The first terminal of the primary side of the coupling inductor is connected to the first terminal of the clamping diode and the first terminal of the clamping capacitor. The first voltage multiplier capacitor has two terminals, one of which is a dotted terminal. The second terminal of the first voltage multiplier capacitor is connected to the positive terminal of the second voltage multiplier diode and the first terminal of the secondary side of the coupling inductor. The first terminal of the secondary side of the coupling inductor is a dotted terminal. The negative terminal of the first voltage multiplier diode is connected to the second terminal of the secondary side of the coupling inductor and the first terminal of the second voltage multiplier capacitor. The second terminal of the secondary side of the coupling inductor is a dotted terminal. The negative terminal of the second voltage multiplier diode is connected to the second terminal of the second voltage multiplier capacitor and the positive terminal of the output diode. The negative terminal of the output diode is connected to the first terminal of the output capacitor and the first terminal of the load. The negative terminal of the input voltage is then connected to the second terminal of the power switch, the second terminal of the clamping capacitor, the second terminal of the output capacitor, and the second terminal of the load. The voltage across the two ends of the load is the output voltage.
[0008] In the converter (1), the clamping diode and the clamping capacitor form the clamping circuit (11) of the power switch, while the secondary side of the coupling inductor, the first voltage multiplier diode, the second voltage multiplier diode, the first voltage multiplier capacitor, and the second voltage multiplier capacitor form a voltage multiplication module (12).
[0009] When the converter (1) is in steady state, it can be divided into 4 linear operation stages within one switching cycle. To simplify the analysis, the following assumptions are made:
[0010] 1. All semiconductor components are ideal, and the on-state voltage drop is zero.
[0011] 2. All capacitor values are large enough that the capacitor voltages can be considered constant.
[0012] 3. The magnetizing inductance of the coupled inductor is much greater than the leakage inductance. The turns ratio is defined as the coupling coefficient.
[0013] 4. Input inductor current operates in continuous conduction mode (CCM).
[0014] The timing and waveform of the converter (1) in one switching cycle are shown in Figure 3, which is the timing diagram of the present invention:
[0015] First Stage []: Please refer again to Figure 4, which shows the equivalent linear circuit diagram of the first stage of the present invention. The first stage begins when the power switch is switched to ON, the input voltage magnetizes the input inductor, the current flowing through the input inductor increases linearly, and the energy stored in the clamping capacitor charges the voltage boosting capacitor via the primary side of the coupling inductor. The voltages across the input inductor and the magnetizing inductor are respectively:
[0016] (1)
[0017] (2)
[0018] The current rises linearly; the leakage inductance crosses a positive voltage, and because the leakage inductance is very small, the current rises rapidly.
[0019] Second Stage []: Please refer again to Figure 5, which shows the equivalent linear circuit diagram of the second stage of this invention. The second stage begins when current flows into the coupling point, and the current on the secondary side of the coupling inductor flows out of the coupling point, causing the first voltage doubler diode and the second voltage doubler diode to conduct. The output capacitor provides energy to the load. In this stage:
[0020] (3)
[0021] (4)
[0022] (5)
[0023] Third Stage []: Please refer again to Figure 6, which shows the equivalent linear circuit diagram of the third stage of this invention. The third stage begins when the power switch is switched to OFF, and the clamping diode becomes forward biased and conducts. The input inductor releases energy to the clamping capacitor through the clamping diode; simultaneously, the voltage across the power switch is clamped to the voltage of the clamping capacitor. In this stage, the voltage across the leakage inductance is negative, and because the leakage inductance value is very small, the current drops rapidly. In this stage:
[0024] (6)
[0025] (7)
[0026] Fourth Stage []: Please refer again to Figure 7, the equivalent linear circuit diagram of the fourth stage of this invention. The fourth stage begins with current, current, then the secondary side of the coupling inductor changes the current flow direction, the current flows into the coupling dot, making the output diode conduct, and the first voltage doubler diode and the second voltage doubler diode are cut off. The input voltage, the input inductor, the voltage boost capacitor, the first voltage doubler capacitor, the second voltage doubler capacitor and the secondary side of the coupling inductor are connected in series to transfer energy to the output capacitor and the load. In this stage:
[0027] (8)
[0028] (9)
[0029] (10)
[0030] (11)
[0031] When the power switch is switched to ON, this stage ends and the converter (1) enters the next switching cycle.
[0032] Based on the operating principle of the converter (1), the steady-state characteristics of the converter (1) are derived; to simplify the analysis, the leakage inductance, which has a very small value, is ignored, and therefore the coupling coefficient is also ignored. At the same time, the short-duration phase is ignored, and only the second and fourth phases are considered. The volt-second balance principle is applied to the input inductor and the magnetizing inductor respectively, that is, for the average voltage of the switching cycle, ...
[0033] Voltage gain analysis:
[0034] Based on the explanation of the operating principle, we can conclude that:
[0035] (12)
[0036] (13)
[0037] Calculated using equation (12), we can obtain:
[0038] (14)
[0039] After calculating and rearranging equations (13) and (14), we can obtain:
[0040] (15)
[0041] In the second stage, the voltage on the secondary side of the coupled inductor is:
[0042] (16)
[0043] Since the first voltage multiplier diode and the second voltage multiplier diode are conducting, the voltages of the first voltage multiplier capacitor and the second voltage multiplier capacitor can be expressed as:
[0044] (17)
[0045] In the fourth stage, the voltage on the secondary side of the coupled inductor is:
[0046] (18)
[0047] Applying the output voltage expression of equation (10) and substituting the results of equations (14), (15), (17) and (18), we can obtain:
[0048] (19)
[0049] Therefore, the voltage gain of the converter (1) is:
[0050] (20)
[0051] As can be seen from equation (20) of the voltage gain, the voltage gain of the converter (1) is determined by two parameters: the conduction ratio of the power switch and the turns ratio of the coupling inductor. Therefore, the voltage gain has two design degrees of freedom. If an appropriate turns ratio is selected, high voltage gain performance can be achieved, and the converter (1) can operate at an appropriate conduction ratio, avoiding operation at a very high conduction ratio. Please also refer to Figure 8, which shows the voltage gain curves of the present invention with different turns ratios. If the conduction ratio and turns ratio are both set, the voltage gain can reach 11 times.
[0052] Voltage stress analysis of power switches and diodes:
[0053] Based on the operation of the converter (1) at each stage, the voltage of the power switch or diode when it is OFF can be known, and the voltage stress can be obtained, wherein the voltage stress of the power switch is:
[0054] (21)
[0055] The voltage stress in the above formula is expressed in terms of output voltage, which is the result of substituting into formula (20).
[0056] From stage 2, the voltage stresses of the clamping diode and the output diode can be obtained as follows:
[0057] (22)
[0058] (23)
[0059] From stage 4, the voltage stress of the first voltage doubler diode and the second voltage doubler diode can be obtained as follows:
[0060] (24)
[0061] (25)
[0062] The voltage stress of all four diodes is lower than the output voltage. The power switch voltage stress of this converter (1) is only a multiple of the output voltage, so MOSFETs with low rated voltage and low on-resistance can be used to reduce the power switch conduction loss. On the other hand, the voltage stress of the diodes of this converter (1) is lower than the output voltage, so power diodes with low forward voltage drop can be used to reduce conduction loss.
[0063] In addition, based on the circuit operation analysis results, the operation of the converter (1) in continuous conduction mode [CCM] was simulated and verified using Is-Spice software. The specifications and parameters of the converter (1) are shown in the table below: Input voltage Leakage inductance Output voltage and load resistor and Switching frequency Turns ratio ,and murf1660ct Input inductance IR10CTQ150 Magnetized Inductor Power switch MTW20N50E Table 1 Converter Specifications and Parameters
[0064] 1. Verify high voltage gain:
[0065] When the output power is 200W at full load, please refer to Figure 9 for the simulated waveforms of the switch drive signal, input voltage 24V and output voltage 200V of the present invention. According to the voltage gain of equation (20), the theoretical value of the conduction ratio is 0.64. The simulation results verify that the converter has a high voltage gain of 8.33 times and does not need to operate at a very high conduction ratio.
[0066] 2. Verify the low-voltage stress of the power switch:
[0067] When the output power is 200W at full load, please refer to Figure 10 for the simulation waveform diagram of the power switch drive signal and the switching voltage and current of the present invention. As can be seen from the figure, the switching voltage stress is approximately the output voltage value. This simulation result is consistent with the analysis result of equation (21), which verifies that the power switch of the converter (1) has low voltage stress and can use a MOSFET with low rated voltage and low on-resistance as a switch to reduce conduction loss.
[0068] 3. Verification of low-voltage stress in diodes:
[0069] When the output power is 200W at full load, please refer to Figure 11 for the voltage simulation waveform diagram of the diode of the present invention. The voltage stress of the clamping diode, the first voltage doubler diode, the second voltage doubler diode and the output diode are all lower than the output voltage, which verifies that the diode has the advantage of low voltage stress.
[0070] 4. Verify the output capacitor voltage:
[0071] When the output power is 200W at full load, please refer to Figure 12 for the voltage simulation waveform diagram of the capacitor of the present invention, the voltage of the clamping capacitor, the voltage boosting capacitor, the first voltage doubler capacitor, the second voltage doubler capacitor, and the analysis results that conform to equations (14)(15)(17).
[0072] 5. Verify the operation of the input inductor in continuous conduction mode [CCM]:
[0073] When the output power is 200W at full load, please refer to Figure 13 for the simulated waveforms of the voltage and current of the input inductor of the present invention. It can be seen that the minimum current is greater than 0, and it is indeed operating in continuous conduction mode [CCM]. On the other hand, the voltage of the input inductor satisfies the volt-second balance theorem.
[0074] As can be seen from the above description of the use and implementation of the present invention, compared with the prior art, the present invention mainly has the following advantages:
[0075] 1. The voltage gain of the present invention has two design degrees of freedom, including the duty ratio and the turns ratio of the coupled inductor, so that a high boost voltage can be achieved and the converter can operate at an appropriate duty ratio.
[0076] 2. The voltage stress of the power switch of the present invention is much lower than the output voltage, so a MOSFET switch with low rated voltage and low on-resistance can be used to reduce conduction loss.
[0077] 3. The diode of the present invention has low voltage stress, and a power diode with low rated voltage and low forward conduction voltage drop can be used to reduce conduction loss.
[0078] 4. The leakage inductance energy of the coupled inductor of the present invention can be recovered, and will not cause voltage surge problems.
[0079] 5. The design of the input inductor of the present invention enables the input current to be continuous [non-pulsating] and limits the current ripple size, thus helping to improve the maximum power point tracking [MPPT] efficiency of the solar cell and extend the battery life.
[0080] However, the foregoing embodiments or figures are not intended to limit the product structure or usage of the present invention. Any appropriate changes or modifications made by those skilled in the art should be considered as not departing from the patent scope of the present invention.
[0081] In summary, the embodiments of the present invention can indeed achieve the expected effects of use, and the specific structure disclosed therein has not only never been seen in similar products, but has also never been disclosed before the application. It has fully complied with the provisions and requirements of the Patent Law. Therefore, we hereby file an application for an invention patent and respectfully request your review and grant of a patent, which would be of great benefit. [Simplified Explanation of the Diagram]
[0082] Figure 1: Circuit diagram of the present invention; Figure 2: Equivalent circuit diagram of the present invention; Figure 3: Timing diagram of the present invention; Figure 4: Equivalent linear circuit diagram of the first stage of the present invention; Figure 5: Equivalent linear circuit diagram of the second stage of the present invention; Figure 6: Equivalent linear circuit diagram of the third stage of the present invention; Figure 7: Equivalent linear circuit diagram of the fourth stage of the present invention; Figure 8: Voltage gain curves of the present invention with different turns ratios; Figure 9: Simulated waveform diagrams of the switch drive signal, input voltage 24V, and output voltage 200V of the present invention; Figure 10: Simulated waveform diagrams of the power switch drive signal, switch voltage, and current of the present invention; Figure 11: Simulated voltage waveform diagram of the diode of the present invention; Figure 12: Simulated voltage waveform diagram of the capacitor of the present invention; Figure 13: Simulated voltage and current waveform diagram of the input inductor of the present invention.
Claims
1. A high-boost DC-DC converter, mainly comprising connecting a first terminal of an input inductor to the positive terminal of the input voltage, the second terminal of the input inductor being connected to a first terminal of a voltage boost capacitor, the positive terminal of a clamping diode, and a first terminal of a power switch, the second terminal of the voltage boost capacitor being connected to a first terminal of the primary side of a coupling inductor, the positive terminal of a first voltage doubler diode, and a first terminal of a first voltage doubler capacitor, the first terminal of the primary side of the coupling inductor being a non-spotted terminal, a magnetizing inductor and a leakage inductor being connected in parallel on the primary side of the coupling inductor, the second terminal of the primary side of the coupling inductor being connected to the negative terminal of the clamping diode and a first terminal of the clamping capacitor, the second terminal of the primary side of the coupling inductor being a spotted terminal, and the first voltage doubler capacitor... The second terminal is connected to the positive terminal of the second voltage multiplier diode and the first terminal of the secondary side of the coupling inductor. The first terminal of the secondary side of the coupling inductor is a dotted terminal. The negative terminal of the first voltage multiplier diode is connected to the second terminal of the secondary side of the coupling inductor and the first terminal of the second voltage multiplier capacitor. The second terminal of the secondary side of the coupling inductor is a dotted terminal. The negative terminal of the second voltage multiplier diode is connected to the second terminal of the second voltage multiplier capacitor and the positive terminal of the output diode. The negative terminal of the output diode is connected to the first terminal of the output capacitor and the first terminal of the load. Then, the negative terminal of the input voltage is connected to the second terminal of the power switch, the second terminal of the clamping capacitor, the second terminal of the output capacitor, and the second terminal of the load. The voltage across the two ends of the load is the output voltage.
2. The high boost DC-DC converter as described in claim 1, wherein, The clamping diode and the clamping capacitor form the clamping circuit of the power switch.
3. The high-boost DC-DC converter as described in claim 1, wherein, The secondary side of the coupled inductor, the first voltage multiplier diode, the second voltage multiplier diode, the first voltage multiplier capacitor, and the second voltage multiplier capacitor constitute a voltage multiplication module.
4. The high boost DC-DC converter as described in claim 1, wherein, The voltage gain of the converter is given by , where VO is the output voltage, Vin is the input voltage, D is the conduction ratio, and the number of turns of the coupling inductor is .
