Manufacturing method of memory device

Abstract

A manufacturing method of a memory device includes forming a stacked structure over the substrate, in which the stacked structure including insulating layers and intermediate layers alternately stacked. A hard mask is formed over the stacked structure, in which the hard mask having contact patterns. The stacked structure is etched by using the hard mask to form contact trenches exposing the upmost one of the intermediate layers. A sealing layer is formed over the hard mask, in which the sealing layer having an opening being offset relative to the contact trenches. Acyclic process of trimming and etching is performed, and includes performing a trimming process to the sealing layer to widen the opening to expose the contact trench nearest to the opening, performing an etching process to the stacked structure to deepen the contact trenches exposed by the opening, and repeating the trimming process and the etching process. Contacts are formed in the contact trenches.

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