Semiconductor device

Abstract

The present disclosure relates to a semiconductor device, and according to an embodiment, the semiconductor device includes a substrate including a cell array region and a core / periphery region around the cell array region, a circuit wiring on the core / periphery region of the substrate, a signal wiring spaced apart from the circuit wiring in a direction perpendicular to an upper surface of the substrate, a contact plug connecting the circuit wiring and the signal wiring, an etch stop layer surrounding an outer peripheral surface of an upper portion of the contact plug, and a wiring insulating layer covering an upper surface of the contact plug and an upper surface of the etch stop layer and covering a side surface of the signal wiring, wherein a lower surface of the signal wiring is positioned at a higher level than a lower surface of the etch stop layer.

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