Semiconductor devices, and methods for manufacturing semiconductor devices

Abstract

A semiconductor device comprising a first nanometer-scale transistor, a second nanometer-scale transistor laminated on the first nanometer-scale transistor, and an intermediate element separation region disposed between the first nanometer-scale transistor and the second nanometer-scale transistor. The intermediate element separation region comprises an insulating layer embedded between the gate electrode or semiconductor layer constituting the first nanometer-scale transistor and the gate electrode or semiconductor layer constituting the second nanometer-scale transistor.

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