Semiconductor structure and method of manufacturing the same

Abstract

Various embodiments of the present disclosure are directed to a method for forming a semiconductor structure comprising vertical thin film transistors (TFTs) in which source and drain electrodes are self-aligned and in which a gate layer is fully cut between the vertical TFTs. Further, various embodiments of the present disclosure are directed to the semiconductor structure resulting from the method. According to an example of the method, a fin-shaped structure comprising a drain electrode and a pair of source electrodes is formed. An isolation wall is then formed covering a sidewall portion of the fin-shaped structure at a boundary region between the source electrodes. Further, a gate layer is deposited overlying and conformally lining the fin-shaped structure and the isolation wall and is cut at the boundary region.

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