Normally-off JFET device
TW202641114APending Publication Date: 2026-10-01ANALOG POWER CONVERSION LLC
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Patent Information
- Application Number
- TW114147506
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-12-12
- Filing Date
- 2025-12-04
- Publication Date
- 2026-10-01
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Figure TWG2TA001078662_001 
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Abstract
A semiconductor device comprises a control terminal, a first conduction terminal, a second conduction terminal, a normally-on transistor, and an optoelectronic circuit. The normally-on transistor is electrically coupled between the first and second conduction terminals and is configured to control a current through the first and second conduction terminals according to a signal on a control terminal of the normally-on transistor. The optoelectronic circuit comprising one or more current-generating photoelectric devices electrically connected in series between the control terminal of the semiconductor device and the control terminal of the normally-on transistor, and configured to generate, in response to the current-generating photoelectric devices being illuminated, a bias voltage sufficient to turn off the normally-on transistor. The normally-on transistor may be a junction field effect transistor (JFET) or a static induction transistor (SIT) comprising a wide-bandgap semiconductor. The semiconductor device may be operable at an ambient temperature of
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