Polishing pad conditioner manufacturing method
Patent Information
- Application Number
- TW114113238
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-04-08
- Publication Date
- 2026-10-16
- Estimated Expiration
- 2045-04-07
AI Technical Summary
The existing methods for dressing polishing pads in semiconductor manufacturing face issues such as metal contamination, uneven flatness, and variable cutting rates, affecting the stability and efficiency of the CMP process.
A method involving a polishing pad conditioner with a substrate, bonding layer, and a protective layer formed through pulse plating, ensuring a uniform protective layer thickness of less than 10 microns to prevent contamination and stabilize the grinding removal rate.
The method stabilizes the grinding removal rate and reduces metal contamination, enhancing the reliability and yield of semiconductor production by eliminating microbubbles and variability in the CMP process.
Smart Images

Figure TWG2TA001080132_001 
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Abstract
Description
Technical Field
[0001] The present invention relates to a method for manufacturing a dresser, and more particularly to a method for manufacturing a polishing pad dresser. Prior Art
[0002] With the rapid development of domestic and international semiconductor markets in recent years due to the demand for materials for computers and their peripheral products, the semiconductor industry has continued to expand and has generated a large amount of foreign exchange income.
[0003] The manufacturing process for semiconductor components is incredibly complex, involving technologies that encompass nearly all of the most important and pivotal technologies and inventions in modern human science. Therefore, semiconductor component production is not only a cutting-edge industry but also one that requires enormous capital to sustain.
[0004] Chemical mechanical polishing (CMP) is an essential technology in semiconductor manufacturing. To ensure a stable and continuous CMP process and maintain wafer quality, the polishing pad must be properly dressed with a dresser to restore its surface morphology and properties.
[0005] Using a dresser to dress the polishing pad still has some problems. For example, the polishing pad may cause metal contamination in the semiconductor process, the flatness of the dresser may be uneven, or the cutting rate of the dresser may change, thereby affecting the stability of the semiconductor process.
[0006] How to effectively improve the stability of the grinding removal rate of the dresser and reduce the contamination that may be caused by the dresser will help improve the reliability, efficiency and production yield of semiconductor production. Summary of the Invention
[0007] This summary is intended to provide a simplified summary of the present disclosure so that readers can have a basic understanding of the present disclosure. This summary is not a complete overview of the present disclosure and is not intended to identify key / critical elements of the present invention or to delineate the scope of the present invention.
[0008] One purpose of the present invention is to provide a method for manufacturing a polishing pad conditioner, which can improve the quality and performance of the polishing pad conditioner, thereby improving the quality and stability of semiconductor production.
[0009] To achieve the above-mentioned objectives, one technical aspect of the present invention relates to a polishing pad conditioner comprising the following steps: first, providing a substrate; utilizing a bonding layer to secure a plurality of trimming protrusions to the substrate; providing a protective material; and utilizing pulse plating to form a protective layer of the protective material on the surfaces of the substrate and the trimming protrusions.
[0010] In some embodiments, the pulse amplitude of the pulse plating in the method for manufacturing a polishing pad conditioner is about 0.1 to 5 amperes.
[0011] In some embodiments, the pulse width of the pulse plating in the method for manufacturing a polishing pad conditioner is about 1 to 5 seconds.
[0012] In some embodiments, the low pulse width of the pulse plating in the method for manufacturing the polishing pad conditioner is about 1 to 5 seconds.
[0013] In some embodiments, the pulse plating process of the method for manufacturing a polishing pad conditioner has a pulse plating working time of about 0.5 to 3 minutes.
[0014] In some embodiments, the total working cycle of the pulse plating of the method for manufacturing the polishing pad conditioner is 6 to 18 cycles.
[0015] In some embodiments, the thickness of the protection layer at the tip of the trimming protrusion is smaller than the thickness at other locations.
[0016] In some embodiments, the protective layer has a thickness of less than about 10 microns.
[0017] In some embodiments, the protective layer is a polymeric protective layer.
[0018] In some embodiments, the method for manufacturing a polishing pad dresser further includes the step of pre-grinding the surface of the polishing pad dresser at 40 Newtons for approximately 5 minutes to remove the protective layer on the top surfaces of the dressing protrusions, so that the cutting rate of the polishing pad dresser is approximately equal to the cutting rate of the polishing pad dresser without the protective layer.
[0019] Therefore, the manufacturing method of the polishing pad dresser of the present invention can provide the polishing pad dresser with a uniform protective layer with a thickness of less than 10 microns, and completely cover the surface of the polishing pad dresser, effectively preventing metal contamination of the semiconductor process, while stabilizing the grinding removal rate of the polishing pad dresser, thereby reducing variability in the semiconductor process, eliminating microbubbles in the protective layer, and reducing contamination of the semiconductor process, thereby improving the yield of the semiconductor process. Simple diagram description
[0020] To make the above and other objects, features, advantages and embodiments of the present disclosure more clearly understood, the accompanying drawings are described as follows: FIG. 1 is a schematic flow chart of a method for manufacturing a polishing pad conditioner according to an embodiment of the present invention. FIG. 2 is a schematic diagram of a current waveform of pulse plating in a method for manufacturing a polishing pad conditioner according to an embodiment of the present invention. FIG3 is a partially enlarged schematic top view of a conventional polishing pad dresser. FIG. 4 is a partially enlarged top view of a polishing pad conditioner manufactured by a method for manufacturing a polishing pad conditioner according to an embodiment of the present invention. FIG. 5 is a schematic side view of a polishing pad conditioner according to an embodiment of the present invention. Implementation Method
[0021] The following detailed description uses examples accompanied by accompanying drawings. However, these examples are not intended to limit the scope of this disclosure, and the description of the structural operation is not intended to limit the order of execution. Any recombination of components to produce a device with equivalent functionality is within the scope of this disclosure. Furthermore, the drawings are for illustrative purposes only and are not drawn to scale. To facilitate understanding, identical or similar components will be designated with the same reference numerals throughout the following description.
[0022] In addition, unless otherwise noted, terms used throughout the specification and claims generally have their ordinary meanings in the art, within the context of this disclosure, and in the specific context. Certain terms used to describe the present disclosure are discussed below or elsewhere in this specification to provide additional guidance to those skilled in the art regarding the description of the present disclosure.
[0023] In the embodiments and claims, unless otherwise specified, the words "a," "an," and "the" may refer to a single or multiple number. The numbers used in the steps are only used to identify the steps for ease of description and are not intended to limit the order or implementation of the embodiments.
[0024] Secondly, the words "include", "including", "have", "contain", etc. used in this article are open terms, which mean including but not limited to.
[0025] FIG1 is a schematic flow chart of a method for manufacturing a polishing pad conditioner according to an embodiment of the present invention. FIG2 is a schematic diagram of a current waveform during pulse electroplating in accordance with an embodiment of the present invention. FIG3 is a top view of a conventional polishing pad conditioner, partially enlarged in section. FIG4 is a top view of a polishing pad conditioner manufactured according to a method for manufacturing a polishing pad conditioner according to an embodiment of the present invention. FIG5 is a schematic side view of a polishing pad conditioner according to an embodiment of the present invention.
[0026] Referring to FIG. 1 and FIG. 5 , a method 100 for manufacturing a polishing pad conditioner includes the following steps. First, in step 110 , a substrate 510 is provided. In step 120 , a plurality of trimming protrusions 520 are secured to the substrate 510 using a bonding layer 530 . Next, in step 130 , a protective material is provided. Subsequently, in step 140 , the protective material is applied by pulse plating to form a protective layer 540 on the surfaces of the substrate 510 and the trimming protrusions 520.
[0027] As shown in FIG. 5 , the polishing pad conditioner 500 includes a substrate 510 , a plurality of trimming protrusions 520 , a bonding layer 530 for fixing the trimming protrusions 520 to the substrate 510 , and a protective layer 540 covering the substrate 510 , the trimming protrusions 520 , and the bonding layer 530 .
[0028] In some implementations, the bonding layer 530 may be formed by electroplating, sintering, or brazing to secure the trimming bumps 520 to the surface of the substrate 510. The protective layer 540 may effectively cover the surface of the substrate 510 and the bonding layer 530 to prevent contamination of the semiconductor process by the metals of the substrate 510 and the bonding layer 530.
[0029] It is worth noting that the protective layer 540 of the polishing pad dresser 500 of the present invention is formed by pulse plating a protective material to form the protective layer 540 on the surface of the substrate 510 and the trimming protrusion 520 to prevent contamination of the semiconductor process.
[0030] Therefore, the protective layer 540 of the polishing pad dresser 500 formed by the method 100 of manufacturing a polishing pad dresser according to the present invention can more stably cover the bonding layer 530 and the substrate 510. Compared to protective layers formed by conventional processes, the protective layer 540 formed by the method 100 of manufacturing a polishing pad dresser according to the present invention only needs to be approximately 10 microns thick to effectively protect the polishing pad dresser 500, unlike conventional processes, which generally require protective layers greater than 15 microns to effectively provide protection.
[0031] Furthermore, it is noteworthy that the method 100 for manufacturing a polishing pad conditioner of the present invention utilizes pulse plating to form the protective layer 540 of the polishing pad conditioner 500, effectively reducing the thickness of the protective layer 540 at the tips and corners of the trimming protrusions 520. For example, the thickness of the protective layer 540 at the tips and corners, such as thickness 502 and thickness 503, can be effectively reduced due to the pulse plating process, thereby preventing an excessively thick protective layer 540 from affecting the cutting removal rate. In some embodiments, thickness 502 and thickness 503 are both less than thickness 501 of the protective layer 540. In some embodiments, thickness 501, thickness 502, and thickness 503 of the protective layer 540 at various locations are preferably all less than 10 microns.
[0032] Referring to Figures 3 and 4, Figure 3 is a top view of a conventional polishing pad conditioner, partially enlarged in section, and Figure 4 is a top view of a polishing pad conditioner fabricated according to a method for manufacturing a polishing pad conditioner according to an embodiment of the present invention. Protective layer 310 and protective layer 410 have similarly sized trimming protrusions. However, after forming protective layers 310 and 410, conventional protective layer 310 forms a thicker protective layer at the tips and corners, resulting in a sharp, protruding protective layer that requires a thicker protective layer to effectively protect the polishing pad conditioner. In contrast, protective layer 410 formed using the polishing pad conditioner manufacturing method of the present invention has a smoother appearance and is thinner, effectively reducing the impact on the removal rate.
[0033] In some embodiments, the ratios of the grinding removal rates of the polishing pad dresser 500 formed by pulse plating using the method 100 of manufacturing the polishing pad dresser of the present invention and the polishing pad dresser 500 without the protective layer were measured to be approximately 0.9606, 1.0059, 0.9901, 0.9665, and 0.9661.
[0034] In contrast, if the protective layer is formed using a conventional process, the ratio of the grinding removal rate of the polishing pad dresser to that of the polishing pad dresser without the protective layer can only reach approximately 0.8037, 0.8423, 0.7496, 0.7419 and 0.7960.
[0035] Therefore, the manufacturing method 100 of the polishing pad dresser of the present invention utilizes pulse electroplating to form the protective layer of the polishing pad dresser 500, which is not only thinner in thickness but also can avoid affecting the grinding removal rate, effectively providing a stable grinding removal rate of the polishing pad dresser 500, thereby improving the stability of the semiconductor process.
[0036] Further referring to FIG. 2 , the pulse plating process of the manufacturing method 100 of the polishing pad dresser disclosed in the present invention has a pulse plating working time 210 of about 0.5 to 3 minutes to form a protective layer of a desired thickness.
[0037] In some embodiments, the pulse amplitude 220 of the pulse plating is approximately 0.1 to 5 amperes. Furthermore, each pulse width 230 of the pulse plating is approximately 1 to 5 seconds. Furthermore, the low pulse width 240 of the pulse plating is approximately 1 to 5 seconds.
[0038] In some embodiments, the total duty cycle of the pulse plating is approximately 6 to 18 cycles.
[0039] In some embodiments, the thickness of the protection layer 540 at the tip of the trimming protrusion 520 is smaller than that at other locations.
[0040] In some embodiments, the thickness of the protection layer 540 is less than about 10 microns, and particularly the thickness of the protection layer 540 at the tip of the trimming protrusion 520 is even less than 10 microns.
[0041] In some embodiments, the protective layer 540 is preferably a polymer protective layer, such as epoxy resin, etc., but the present invention is not limited thereto.
[0042] Referring to FIG. 1 again, as shown in the figure, the manufacturing method 100 of the polishing pad dresser of the present invention further includes step 150 of removing the protective layer 550 on the top surface of the trimming protrusion 520.
[0043] In some embodiments, the surface of the polishing pad dresser 500 is pre-grinded at 40 Newtons for approximately 5 minutes to remove the protective layer 550 on the top surface of the dressing protrusions 520. This allows the polishing pad dresser 500 to have a removal rate approximately equal to the removal rate of the polishing pad dresser 500 without the protective layer 540, thereby more effectively stabilizing the removal rate of the polishing pad dresser 500.
[0044] In summary, the manufacturing method of the polishing pad dresser of the present invention can provide the polishing pad dresser with a uniform protective layer with a thickness of less than 10 microns, which completely covers the surface of the polishing pad dresser, effectively preventing metal contamination of the semiconductor process, while stabilizing the grinding removal rate of the polishing pad dresser, thereby reducing variability in the semiconductor process, eliminating microbubbles in the protective layer, and reducing contamination of the semiconductor process, thereby improving the yield of the semiconductor process.
[0045] Although the present disclosure has been disclosed above in the form of implementation methods, it is not intended to limit the present disclosure. Anyone with ordinary knowledge in the art can make various changes and modifications without departing from the spirit and scope of the present disclosure. Therefore, the scope of protection of the present disclosure should be determined by the scope of the attached patent application.
[0046] 100: Manufacturing method of polishing pad dresser 110~150: Steps 210: Pulse plating working time 220: Pulse amplitude 230: Pulse width 240: low pulse width 310: Protective layer 410: Protective layer 500: Polishing pad dresser 501:Thickness 502: thickness 503:Thickness 510: base material 520: Trimming protrusions 530: bonding layer 540: Protective layer 550: Top surface protective layer
Claims
1. A method for manufacturing a polishing pad dresser, comprising: providing a substrate; securing a plurality of trimming protrusions to the substrate using a bonding layer; providing a protective material; and forming a protective layer on the substrate and the trimming protrusions using pulse plating, wherein the pulse plating has a pulse amplitude of approximately 0.1 to 5 amperes, a pulse width of approximately 1 to 5 seconds, and a low pulse width of approximately 1 to 5 seconds.
2. The method for manufacturing a polishing pad conditioner according to claim 1, wherein the pulse plating operation time of the pulse plating is about 0.5 to 3 minutes.
3. A method for manufacturing a polishing pad conditioner, comprising: providing a substrate; fixing a plurality of trimming protrusions on the substrate using a bonding layer; providing a protective material; and forming a protective layer on the substrate and the trimming protrusions using pulse plating, wherein the pulse plating operation time of the pulse plating is approximately 0.5 to 3 minutes, and the total operation cycle of the pulse plating is 6 to 18 cycles.
4. The method for manufacturing a polishing pad dresser according to claim 1 or 3, wherein the thickness of the protective layer at the tip of the dressing protrusion is smaller than that at other locations.
5. The method for manufacturing a polishing pad conditioner according to claim 1 or 3, wherein the thickness of the protective layer is less than about 10 microns.
6. The method for manufacturing a polishing pad dresser as claimed in claim 1 or 3, further comprising: pre-grinding the surface of the polishing pad dresser at 40 Newtons for approximately 5 minutes to remove the protective layer on the top surfaces of the dressing protrusions, so that the cutting rate of the polishing pad dresser is approximately equal to the cutting rate of the polishing pad dresser without the protective layer formed on the polishing pad dresser.
