Manufacturing method of sic laminate
Patent Information
- Application Number
- TW114113199
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-04-08
- Publication Date
- 2026-10-16
- Estimated Expiration
- 2045-04-07
AI Technical Summary
Existing methods for manufacturing SiC multilayers face challenges in precisely controlling the nucleation and horizontal epitaxy steps, leading to issues like dual peripheral boundaries (DPB), multinucleation, and reduced mobility of electrons and holes due to misaligned interfaces and step differences, which hinder the production of high-performance semiconductor devices.
A method involving the formation of positive and negative tilt surfaces on hexagonal SiC layers with specific angle configurations and ridge line arrangements to ensure parallel interfaces and prevent DPB, allowing for the reproducible growth of cubic SiC layers without precise control over surface shape and alignment.
This approach enables the formation of SiC stacks with parallel interfaces and suppressed DPB, resulting in high-reliability, low-loss semiconductor devices by ensuring consistent two-dimensional nuclei formation and preventing multinucleation, thus enhancing the mobility of electrons and holes.
Smart Images

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Abstract
Description
Method for manufacturing SiC laminates This invention relates to a method for manufacturing a SiC multilayer suitable for use as a substrate for semiconductor devices or sensors, integrated circuits, etc., that operate at high temperatures, high power densities, and high frequencies, and particularly to a method for manufacturing a SiC multilayer formed by stacking a single-crystal hexagonal SiC layer with a single-crystal cubic SiC layer. Rectifying and switching devices using single-crystal silicon carbide (SiC) as the substrate material have been practically applied in electric motors for trams and air conditioners, industrial power supplies, and household appliances. The single-crystal SiC substrates used in the manufacture of these semiconductor devices primarily possess a bandgap of 3.2 eV (E). g ) of 4H-SiC. Through this wider E g At the same time, the breakdown voltage (V) of the semiconductor device is achieved. b Improvement of characteristic on-resistance (R) on The reduction of ) reduces losses during power conversion. V of 4H-SiC b The higher value is due to its wider E. g However, conversely, its wider E g This can also compromise the low-loss performance and long-term reliability of switching elements. For example, in metal-oxide-semiconductor field-effect transistors (MOSFETs) using 4H-SiC as the substrate, the energy density (D) at the oxide-semiconductor interface (MOS interface) is significantly reduced. it The channel resistance (R) will increase. ch This will increase and hinder the reduction of power loss. Furthermore, because 4H-SiC has a wider Eg, when forming a metal-oxide-semiconductor (MOS) structure, the amount of charge leaking from the oxide film through the oxide film to the metal side is greater than that in a MOS structure formed on Si, and the problem of shortened oxide film lifetime is also more serious. On the other hand, among the polymorphs of SiC, cubic SiC (3C-SiC), the only one belonging to the cubic crystal system, shows its E... g It is 2.3 eV, which is about 1 eV narrower than that of 4H-SiC, but this narrower E... g This creates D at the MOS interface it It will be about two digits lower than 4H-SiC. Therefore, cubic SiC can be used to manufacture low-loss and high-speed switching devices. In addition, the E of cubic SiC g The electron affinity is about 0.9 eV higher than that of 4H-SiC. Therefore, in the MOS structure, less charge leaks from the cubic SiC side through the oxide film to the metal side, and the long-term reliability of the oxide film is improved compared to that of Si. Furthermore, in order to increase the electron (or hole) concentration of the cubic SiC layer, E g A hexagonal SiC layer, wider than a cubic SiC layer, is sandwiched between matching interfaces. The high electron affinity of the cubic SiC layer and the spontaneous polarization induced by the hexagonal SiC layer enable the formation of two-dimensional regions with high electron concentration (2DEG) and high hole concentration (2DHG) at the matching interface. This two-dimensional conductivity effect enhances the mobility of electrons and holes in the direction parallel to the matching interface, enabling low-loss and high-speed transistor operation, such as HEMT (High Electron Mobility Transistor). Furthermore, in the construction of alternating stacks of cubic and hexagonal SiC layers (layer stacking), two or more parallel matching interfaces are formed. At each matching interface, the Si polar facet and the C polar facet naturally abut against each other. However, if one of the adjacent matching interfaces is a structure where the C polar facet of cubic SiC abuts against the Si polar facet of hexagonal SiC (N-type matching interface), then the other will be a structure where the Si polar facet of cubic SiC abuts against the C polar facet of hexagonal SiC (P-type matching interface). In this case, electrical conduction occurs via electrons at the N-type matching interface, and via holes at the P-type matching interface. Therefore, a monolithic complementary field-effect transistor (FET) can also be fabricated using a single SiC layer stack structure. To achieve a high-performance semiconductor device that leverages the advantages of cubic SiC, Patent Document 1 (Japanese Patent No. 6795805) provides a method for manufacturing a SiC multilayer. This method is characterized by comprising: a step of forming a seed plane parallel to the densest plane of the crystal lattice (equivalent to the substrate plane described in this specification) in one or more regions on the surface of a hexagonal SiC layer (seed step); a step of providing inclined surfaces with a positive tilt angle of 0.5 degrees or more and less than 73 degrees relative to the seed plane on all surfaces adjacent to the seed plane (off step); and a step of generating a two-dimensional nucleus of cubic SiC on the seed plane (nucleus generation step), which includes a step of simultaneously epitaxially growing both the two-dimensional nucleus of cubic SiC and the SiC layer exposed on the inclined surface in a direction parallel to the densest plane of the crystal lattice (horizontal epitaxy step). This method enables all interfaces of the SiC stack to become matched heterogeneous interfaces, allowing for the differentiation between cubic SiC surfaces and hexagonal SiC surfaces, thus facilitating the configuration of semiconductor devices and resulting in high-performance semiconductor devices. Patent Document 2 provides a semiconductor device and its manufacturing method that suppresses twinning on hexagonal SiC and has a good cubic SiC single crystal layer. Therefore, the structure of the provided semiconductor device includes: a hexagonal single crystal SiC substrate having a first main surface and a single crystal cubic SiC layer disposed on the first main surface. The first main surface is tilted at a predetermined angle in a predetermined direction relative to the (0001) surface or the (000-1) surface to form a step, and the height of the step is one unit cell length of the crystal structure of the SiC substrate. A method for manufacturing a semiconductor device to achieve this structure includes the following steps: preparing a hexagonal single-crystal SiC substrate having a first main surface tilted at a predetermined angle relative to a (0001) surface or a (000-1) surface in a predetermined direction; etching the first main surface of the SiC substrate in a hydrogen-containing gas environment such that the height of the step on the first main surface is one unit cell length of the crystal structure of the SiC substrate; and epitaxially growing a single-crystal 3C-SiC layer on the first main surface after the etching process. [Previous Art Documents] [Patent Documents] [Patent Document 1] Japanese Patent No. 6795805 [Patent Document 2] Japanese Unexamined Patent Application No. 2024-035252 [Problem to be Solved by the Invention] The method provided in Patent Document 1 is characterized by setting a seed plane parallel to the densest facet (substrate plane) on the surface of hexagonal SiC, and the seed plane abutting against an inclined plane inclined at a positive angle relative to the seed plane, thus enabling the deposition of a single layer of cubic SiC on hexagonal SiC. However, it is not easy to deposit hexagonal SiC layers on cubic SiC, and the conditions of the nucleation step and the horizontal epitaxy step on the surface of cubic SiC must be precisely controlled. Furthermore, the method provided in Patent Document 1 requires that the extension direction of the ridges of the undulating shape formed on the hexagonal SiC surface be aligned within 2 degrees of the non-tilted direction perpendicular to the tilted surface. If this directional error exceeds 2 degrees, a cubic SiC layer cannot be obtained at the predetermined location, thus causing a decrease in yield during semiconductor device manufacturing. Therefore, precise shape control is necessary during the SiC laminate manufacturing process. For example, even if the ridges of the undulating shape formed on the surface of hexagonal SiC are aligned within 2 degrees of the non-tilted direction, if the ridge system formed on the surface of hexagonal SiC is tilted relative to the substrate, the steps of hexagonal SiC will remain on the seed surface, creating a problem that hinders the nucleation of cubic SiC. Alternatively, even if nuclei are formed in cubic SiC, these nuclei are prone to multinucleation. Multinucleation of cubic SiC will create a double positioning boundary (DPB) within the cubic SiC layer, reducing the mobility of electrons or holes. Therefore, there are situations where a surface structure stabilization step must be performed after the tolerance of the hexagonal SiC surface is reduced to less than 0.3 degrees, and there are also situations where the conditions of the horizontal epitaxy step and the nucleation step must be precisely controlled. On the other hand, while the structure and method provided in Patent Document 2 eliminate the twinning in cubic SiC, the interface between cubic SiC and hexagonal SiC is not necessarily parallel to the substrate surface and contains a step difference equivalent to one unit cell length of the crystal structure of the hexagonal SiC substrate. Therefore, electrons and holes become scattered at this step difference, reducing their mobility. Furthermore, because this step difference differs from the three molecular layers of one unit cell length in cubic SiC, a phase difference occurs in the deposition of crystal planes within the cubic SiC layer, still presenting unavoidable problems of deposition defects and DPB (depositional basis point). In view of the above problems, the object of the present invention is to obtain cubic SiC layers where all interfaces between cubic SiC and hexagonal SiC remain parallel to the substrate surface, and cubic SiC layers do not contain DPB in predetermined locations, without requiring precise control of the horizontal epitaxial layer and nucleation steps, strict alignment of the extension direction of undulating ridges, and strict management of hexagonal SiC surface tolerances. Furthermore, it also eliminates the need for strict control of the horizontal epitaxial layer and nucleation steps, strict alignment of the extension direction of undulating ridges, and strict management of hexagonal SiC surface tolerances. [Means for Solving the Problems] The inventors of this invention conducted in-depth research to solve the above-mentioned problems, and discovered that by giving specific conditions to the shape of the ridges formed on the inclined surface of hexagonal SiC, it is possible to generate single nuclei of cubic SiC at necessary locations without strict control over the processing shape of the SiC substrate surface, precise control of the horizontal epitaxial step and nucleation step, or the need for surface structure stabilization steps, thereby suppressing the occurrence of DPB (Dual Peripheral Block). Furthermore, it was discovered that by making the single nuclei of cubic SiC multiple times and displacing each location in the inclined direction, a multilayer SiC laminate formed by depositing hexagonal SiC on cubic SiC can be manufactured. The means by which the present invention solves the problem are described below. [1] A method for manufacturing a SiC stack, which is a method for manufacturing a SiC stack formed by a single-crystal hexagonal SiC layer and a single-crystal cubic SiC layer through a matching interface layer, comprising: forming a positive tilt surface (P) on a portion of the surface of the aforementioned hexagonal SiC layer. f The steps of the positive inclined surface (P) f ) is relative to the substrate surface (P) of the hexagonal SiC layer b The positive tilt angle (θ) is a depression angle greater than 0.5 degrees and less than 30 degrees. f ), relative to the positive tilt direction (α) consistent with either the <11-20> direction or the <1-100> direction. f ) tilt; and the formation of a negative tilt surface (P) r The steps of the negative inclined surface (P) r ) is adjacent to the aforementioned positive tilting surface, and is opposite to the negative tilting direction (α) which is opposite to the aforementioned positive tilting direction. r ) relative to the base surface (P) b A negative tilt angle (θ) of 54 degrees or more. rThe manufacturing method includes tilting the aforementioned positively tilted surface (P); and the manufacturing method includes: tilting the aforementioned positively tilted surface (P) f The uppermost part of ) and the aforementioned negative inclined surface (P) r The angle between the line formed by the uppermost points of the two edges, i.e., the ridge line (J), and the aforementioned positive inclination direction, i.e., the ridge line deflection angle (Φ). j The angle is between 15 degrees and 86 degrees, and the aforementioned ridge line (J) is formed by connecting two or more line segments, such that at least one inflection point of the ridge line at the connection of these line segments is in the aforementioned negative inclination direction (α). r The prominent ridge apex (τ), while on the substrate surface (P) of the hexagonal SiC layer. b The horizontal epitaxial growth step of SiC is performed in a direction parallel to the direction described in [1]. [2] The method for manufacturing SiC stacks as described in [1] includes setting two or more of the aforementioned ridge line vertices (τ), and configuring each ridge line vertex (τ) to be not parallel to the aforementioned positive tilt direction (α). f Orthogonal non-inclined directions (α) p Arrange them in a straight line, and make the distance between adjacent ridge vertices (τ) greater than 0.5μm. Furthermore, where the Miller index, representing the plane orientation of SiC crystals, is negative, a horizontal bar should be drawn above the number. However, this cannot be done here, so a minus sign "-" is added before the number in this specification and the claims. [Effects of the Invention] First, to illustrate the effects of the present invention, Figure 1 is used to explain the terrace formed by the densest faces of Si-C molecules formed on the surface of SiC. x ) and the steps (S) belonging to its end face x The microscopic structure of hexagonal SiC single crystals. Hexagonal SiC single crystals possess many crystalline polymorphs, each formed by the closest facet of the Si-C molecule along its normal direction (α). z They are stacked while maintaining their inherent periodicity. In the case of hexagonal SiC, the closest planes are parallel to the basal plane of the crystal. The surface of the closest plane is the polar Si surface (α). z In the
[0001] direction, the surface of the densest facet is of C polarity α. z The direction is [000-1]. Additionally, the countertop (P) x ) and the step (S) corresponding to its end. x ), in a positive tilt direction (α) relative to the base surface, consistent with either a specific <11-20> direction or a specific <1-100> direction. f The sloping SiC surface is exposed at approximately equal intervals. Steps (S) x ) system and positive tilt direction (α) f Orthogonal, and along a non-inclined direction parallel to the base plane (α) p Extending. For example, extending the positive tilt direction (α) f In the case where the direction is [11-20], the non-tilted direction (α) p The direction is [-1100]. Alternatively, the positive tilt direction (α) is... f If the direction is set to [1-100], the non-tilted direction (α) p The direction is [-1-120]. Additionally, it is located relatively in the positive tilt direction (α). f The negative tilt direction (α) in the opposite direction of ) r The platform in the α direction is relative to the platform in the positive tilt direction (α). f Regarding the platform, in relation to the normal direction (α) of the base surface... z ) Displacement. In this specification, the normal direction (α) of the base surface will be... z The platform and steps located on the upper side are referred to as the upstream side, and the platform and steps located on the lower side are referred to as the downstream side. In addition, in this specification, the phenomenon of the steps on the upstream side growing laterally towards the downstream side is referred to as flow. As disclosed in Patent Document 1, by providing a seed surface parallel to the substrate surface and an inclined surface on the surface of the hexagonal SiC layer, the two-dimensional nuclei of cubic SiC generated on the seed surface can be laterally expanded on the inclined surface, thereby forming a cubic SiC layer on the hexagonal SiC layer. For example, as shown in Figure 2(a), in the hexagonal SiC layer (L... h ) surface settings relative to the substrate surface (P) b ) in the positive tilt direction (α) f ) at a certain positive tilt angle (θ) f ) Inclined positive inclined plane (P) f Furthermore, it is set relative to the base surface (P). b ) in the positive tilt direction (α) f The opposite direction of ) with the same negative tilt angle (θ) r ) Inclined negative inclined surface (P) r ), in relation to the base surface (P) b If SiC is epitaxially grown in a direction parallel to the crystal plane, as shown in Figure 2(b), the seed plane (P) will be formed. s ) will be in a positive tilt (P) f ) and negative tilt surface (P) r In the direction of the normal to the base surface (α) z Starting from the ridge line (J) formed by the convergence of the uppermost parts of the ridge, and intersecting with the base surface (P) b It expands in a parallel direction. As shown in Figure 2(c), the seed plane (P) s If the width exceeds the critical width (w) for two-dimensional nucleus generation determined by the temperature of the horizontal epitaxial step described later, c Near the center of the seed plane, two-dimensional nuclei (γ) of cubic SiC will be generated, and due to the flow at their ends, they will tilt in the positive tilt direction (α). f ) expands. As a result, as shown in Figure 2(d), in the hexagonal SiC layer (L h A cubic SiC layer (L) was obtained on the surface. c For example, even if a large number of two-dimensional nuclei (γ) of cubic SiC are generated simultaneously due to multinucleation, as long as the seed plane (P) s ) surface and base surface (P b If the γ nuclei are parallel, the stacking order of the two-dimensional nuclei (γ) of each cubic SiC will be consistent, resulting in a cubic SiC layer (L). c DPB will not be included in it. However, if the ridge line is relative to the positive tilt direction (α) as shown in Figure 3(a) f The deflection angle (Φ) j If the angle is less than 88 degrees, it will move from the ridge line (J) towards the non-inclined direction (α). p Steps (S) also occur. x The step flow of ) will cause the seed surface (P) to flow. s The width of the kernel continues to narrow to the critical width (w) for two-dimensional kernel generation. c As a result, as shown in Figure 3(b), the formation of two-dimensional nuclei (γ) in cubic SiC is hindered, and a cubic SiC layer cannot be obtained. This phenomenon is illustrated in Figure 4 at a microscopic level, where the ridge line (J) cuts across the mesa (P) from the upstream side to the downstream side. x The upstream step will continue to flow downstream, thus preventing the seed crystal surface (P) from being blocked. s )expand. In contrast, the method for manufacturing SiC stacks provided by this invention, as shown in FIG5(a), involves aligning the line segments constituting the ridge line (J) with the line segments parallel to the positive tilt direction (α). f The included angle Φ of the clamp is greater than 15 degrees and less than 86 degrees. j1 Φ j2 And they intersect, and the vertex (τ) of the ridge line at the meeting point of each line segment is inclined in a negative direction (α). r ) Orientation. The vertex (τ) of the ridge line is the normal direction (α) on the substrate surface of the hexagonal SiC layer. z The vertex on the seed plane (P) is shown in Figure 5(b). s It will expand from the vertex (τ) of the ridge line, and as shown in Figure 5(c), at the seed plane (P) s The width of the kernel exceeds the critical width (w) for two-dimensional kernel generation. c The time point is at the seed plane (P) sTwo-dimensional (γ) nuclei of cubic SiC will form near the center of the crystal. Since the ridge vertices (τ) are located at the upstream edge of the flow step, they will not obstruct the seed plane (P). s The expansion of γ will maintain the formation of two-dimensional nuclei (γ) in cubic SiC. As a result, as shown in Figure 5(d), a cubic SiC layer (L) will be formed downstream of the ridge vertex (τ). c ). Furthermore, in the SiC laminate manufacturing method provided by this invention, the two-dimensional nuclei of cubic SiC generated on the seed surface are always mononuclear, so DPB will not occur in the cubic SiC layer formed by its expansion. In contrast, in the SiC laminate manufacturing method provided in Patent Document 1, mononuclear two-dimensional nuclei of cubic SiC may not necessarily be obtained on the seed surface. The reason for this will be explained using FIG6. The two-dimensional nuclei (γ) of cubic SiC expands to a width (w) exceeding the critical width for two-dimensional nuclei generation, parallel to the ridge line (J) and the substrate surface. c This indicates that the seed crystal is generated at the point in time (P). s A diameter of (w) can be drawn on it. c The imaginary incircle (C) γ At the point in time (C), the inscribed circle (C) γ Two-dimensional (γ) nuclei of cubic SiC will be generated at the center of the crystal. The method for manufacturing SiC stacks provided in Patent Document 1, as shown in Figure 6(a), corresponds to the negative tilt direction (α) of the seed plane. r The ridge line (J) at the end of the ) is parallel to the non-inclined direction (α). p A roughly parallel straight line. Positive inclination direction (α) f The end of ) also terminates strictly in the non-inclined direction (α). p Parallel matching interfaces. Seed planes (P) with these parallel ends. s The width of the kernel reaches the critical width (w) for two-dimensional kernel generation. c The timing point can be simultaneously at the seed plane (P) s Draw a plurality of inscribed circles (C) on the surface. γTherefore, multinuclei (γ) will form in the two-dimensional nuclei of cubic SiC, on the seed plane (P). s If the stacking of all the two-dimensional nuclei (γ) generated on the surface is inconsistent, DPB will occur within the cubic SiC layer. In contrast, in the SiC multilayer manufacturing method provided by this invention, the seed plane (P) s One end of the ) is not in the non-inclined direction (α) p Instead of being parallel, it is equivalent to a ridge line (J) containing more than one ridge line vertex (τ), so as shown in Figure 6(b), at the seed plane (P) s ) expands to reach the critical width (w) for two-dimensional kernel generation c At the point in time, at the seed plane (P) s It is not possible to draw multiple (C) at the same time. γ In cubic SiC, the two-dimensional nuclei (γ) will always be generated as single nuclei, thus suppressing DPB in the cubic SiC layer. However, when there are multiple ridge vertices (τ), if the interval between adjacent ridge vertices (τ) is less than the critical width (w) for generating the two-dimensional kernel... c ), the inscribed circle (C) near the vertex (τ) of each ridge line γ If they overlap, a two-dimensional kernel (γ) will not be generated at the intended location. Therefore, this invention avoids the formation of multiple inscribed circles (C) by ensuring that the spacing between adjacent ridge vertices (τ) is greater than 0.5 μm. γ () overlap. Furthermore, in the SiC multilayer manufacturing method provided by the present invention, the arrangement of the ridge lines and the positive tilt angle (θ) are used to achieve the desired effect. f ), Ridge line deviation angle (Φ) j The shape of the expanded cubic SiC region is uniquely determined by the SiC film thickness grown in the horizontal epitaxial step, thus reproducibly obtaining a cubic SiC layer that matches the design of the desired semiconductor device. The present invention can also be illustrated in Figure 7 by setting a plurality of ridge vertices (τ) on the ridge line (J), in which case a plurality of cubic SiC layers (L) can be fabricated. c ) and hexagonal SiC layer (L h The SiC stack is formed by the accumulation of phase layers. Furthermore, the vertices (τ) of each ridge line are configured not in the non-tilted direction (α). p Arranged in a straight line, thus expanding from the vertex (τ) of the ridge line, a plurality of seed planes (P) extend. s ) will be relative to the normal direction of the base surface (α) z Displacement occurs. Therefore, multiple cubic SiC layers (L1, L2, L3, L4) expand in a direction parallel to the substrate plane through horizontal epitaxy steps, starting from the two-dimensional nucleus (γ) of cubic SiC generated on each seed plane. c They will not converge on the same substrate surface, making it possible to create SiC stacks by depositing hexagonal SiC on cubic SiC layers. Furthermore, it effectively suppresses the occurrence of DPB within the cubic SiC layer. As explained above, the method for manufacturing SiC stacks provided by the present invention ensures that the cubic SiC layer contained in the SiC stack is indeed formed, and DPB does not occur in the formed cubic SiC layer. Therefore, SiC stacks suitable for high-performance semiconductor devices can be manufactured with high reproducibility. Furthermore, the present invention can manufacture SiC stacks composed of arbitrary multilayer structures by arranging a plurality of ridge vertices (τ), and can utilize 2DEG or 2DHG generated at the interface of the SiC stack, or utilize quantum well structures formed by sandwiching cubic SiC layers between hexagonal SiC layers to obtain semiconductor devices with more functions. The following describes several embodiments of the SiC multilayer fabrication method disclosed in this specification. [Embodiment 1] When implementing the SiC multilayer fabrication method of the invention, a single-crystal hexagonal SiC wafer can be used as a substrate. Regarding single-crystal SiC wafers, although commercially available 4H-SiC or 6H-SiC wafers are available, a 3.2 eV E-type wafer suitable for manufacturing high-voltage power semiconductor devices is used. g 4H-SiC wafers are better suited for manufacturing high-voltage power semiconductor devices. Furthermore, if using relative to the base surface (P) b The 4H-SiC wafer surface (0001) is tilted at a certain angle, and this surface can be used as a positive tilt surface (P). f Therefore, the formation of the positive inclined surface (P) can be omitted. fThe steps are as follows. In this case, the polarity of the substrate surface can be selected as either the Si side or the C side depending on the application, but this embodiment uses the Si side to realize the fabrication of the SiC multilayer, which is most suitable for the manufacture of power semiconductors. The tilt angle of a 4H-SiC wafer relative to the substrate surface is equivalent to a positive tilt angle (θ). f The effect of this invention can be obtained by ensuring that the value is greater than 0.5 degrees and less than 54 degrees. Positive tilt angle (θ) f The lower the angle (θ), the more it promotes the expansion of the cubic SiC surface area formed in the horizontal epitaxial step described later. However, when the positive tilt angle (θ) is lower, it also promotes the expansion of the cubic SiC surface area formed in the horizontal epitaxial step described later. f Less than 0.5 degrees, positive tilt plane (P) f The step spacing on the surface of the cubic SiC becomes greater than 50 μm, and the two-dimensional nucleation of cubic SiC occurs on the mesa, making it difficult to obtain a matching interface between cubic SiC and 4H-SiC. Therefore, the positive tilt angle (θ) f The angle of inclination is preferably 1 degree or more and less than 30 degrees. To ensure that the thickness error of the cubic SiC film obtained in the horizontal epitaxial step is within 5%, it is more preferably 2 degrees or more and less than 10 degrees. Therefore, in this embodiment, the positive tilt angle (θ) is... f The degree is 4. Positive tilt direction (α) f The effects of this invention can be obtained by selecting either the [1-100] direction or the [11-20] direction, but this embodiment selects the [11-20] direction, which is the typical tilt direction of commercially available wafers. In this case, the positive tilt direction (α) f ) is in the [11-20] direction, with a negative tilt direction (α). r ) is in the [-1-120] direction, and the non-tilted direction (α) p The direction is [1-100]. Next, the positive tilt plane (P) is implemented. f Local processing is used to form a negative slope surface (P). r To obtain the negative tilt surface (P) r It must form a positive tilt direction (α) f The negative tilt direction (α) in the opposite direction to the positive tilt direction. r The inclined portion of the surface. To form an equivalent negative inclined surface (P) r When machining the surface of a portion of the surface, laser processing or machining can be used to create grooves, and the sidewall of the groove can be used as a negative inclined surface (P). r However, given its reproducibility of machined shapes, dimensional accuracy, and negative tilt angle (θ), r For better control, it is still best to use a combination of lithography and dry etching to form trenches and then use the sidewalls of the trenches. Specifically, photoresist patterns are arranged on a substrate to form a desired positive tilt surface (P) using photolithography. f The shape of the photoresist pattern is used as a mask to form trenches on a 4H-SiC substrate using dry etching, and the sidewalls of the trenches are used as negative inclined surfaces (P). r For dry etching, a parallel-plate type plasma etching apparatus or an inductively coupled plasma etching apparatus can be used to make SF... 6 or CF A fluorine-based gas of grade 4 is ionized and irradiated onto a SiC substrate to form trenches. The resulting negative tilt angle (θ) can be adjusted by modifying the photoresist and the etching rate of the SiC substrate. r In this embodiment, a photoresist pattern with a thickness of 2 μm and the shape described later is formed on the aforementioned SiC substrate using a contact aligner, and then CF... 4. After gas is introduced into the inductively coupled plasma etching apparatus, a photoresist pattern is transferred to SiC at a depth of 0.5 μm to form a negative tilt surface at an output of 1 kW. The deeper the trench, the more pronounced the negative tilt surface (P). r The larger the area of the ridge (J), the thicker the SiC layer formed in the horizontal epitaxial step described later can be. However, as the dry etching time increases, the shape error of the ridge line (J) will increase, or the negative tilt surface (P) will become larger. r The roughness of the surface will increase, so the depth of the groove is preferably below 2μm. The sidewalls of the trenches etched in the above steps become the negative inclined surface (P) shown in Figure 5(a). r The angle between the negative tilt plane and the base plane is the negative tilt angle (θ). r Positively inclined plane (P) f ) and negative tilt surface (P) rThe lines formed by the contact of the photoresist patterns on the substrate surface are equivalent to ridge lines (J). These ridge lines (J) are aligned with the negative tilt direction (α) of the aforementioned photoresist pattern. r The ends on both sides are consistent. Here, the negative tilt angle (θ) r A tilt of 54 degrees or higher is acceptable, but in this embodiment, it is necessary to suppress the seed plane from tilting towards the negative tilt direction (α). r Enlarging the structure of SiC stacks makes it easier to control the structure, thus allowing for a greater negative tilt angle (θ). r The angle is set as close to 90 degrees as possible. Therefore, trenches with sidewalls perpendicular to the surface of the SiC wafer are formed. To achieve the desired effect of this invention, obtaining cubic SiC without BPD at a predetermined location requires controlling the aforementioned positive tilt plane (P) as follows. f ) and negative tilt surface (P) r The shape of the ridge line (J) formed by the meeting of the uppermost parts of the ridge line (J) must first be determined so that the ridge line (J) and the ridge line (J) are aligned with the positive tilt direction (α). f The ridge line formed by the intersection of parallel straight lines has an angle of deviation (Φ). j1 Φ j2 The angle must be between 15 degrees and 86 degrees. The ridge deflection angle mentioned here refers to the angle at the sharp angle where a line parallel to the positive tilt direction intersects the ridge. When the ridge deflection angle is less than 15 degrees, the width of the seed plane formed near the top of the ridge becomes narrower, making the formation of two-dimensional nuclei (γ) in cubic SiC more difficult. Furthermore, even if two-dimensional nuclei (γ) in cubic SiC are formed, the angle towards the non-tilted direction (α) will be less favorable. p The expansion of ) is limited, so it is best to make Φ j1 Φ j2 All are above 30 degrees. On the other hand, when the ridge line deflection angle is greater than 86 degrees, due to the alignment error of the aforementioned contact exposure machine, some ridge lines (J) become parallel to the non-tilted direction, increasing the possibility of multinucleation of two-dimensional (γ) nuclei in cubic SiC, making it difficult to eliminate BPD. Therefore, it is better to keep the ridge line deflection angle above 30 degrees and below 80 degrees. For example, when the ridge line is deflected towards the angle (Φ) j1 Φ j2The inclination angle is 78.7 degrees, and a 5 μm thick SiC epitaxial growth layer is formed through the horizontal epitaxial growth steps described later. Then, at a positive tilt angle (θ)... f A positively inclined plane with a degree of 4 (P) f On the surface of the cubic SiC epitaxial growth layer, the width of the layer increases in the positive tilt direction (α). f The maximum value is 72 μm in the non-tilted direction (α). p The maximum size is 1440μm. The method for manufacturing SiC stacks provided by this invention involves performing a horizontal epitaxial growth step after forming ridge lines (J). This horizontal epitaxial growth step can be achieved using vapor phase growth, solution growth, or sublimation. However, considering the reproducibility of conditions in the horizontal epitaxial growth step, the ease of designing the ridge line configuration, the controllability of the SiC layer thickness obtained by epitaxial growth, and the controllability of impurity addition, vapor phase growth is preferred for implementing the horizontal epitaxial growth step. When performing horizontal epitaxial growth using the vapor phase growth method, a commercially available vapor phase growth apparatus is used. A 4H-SiC wafer, prepared with the aforementioned tilted surface, is placed on a graphite susceptor coated with SiC. The susceptor is then placed in a quartz reaction vessel. The wafer is heated to a predetermined temperature by induction heating of the susceptor from outside the reaction vessel. Finally, a feed gas is introduced into the reaction vessel to achieve SiC epitaxial growth. The feed gas can be SiH... 4 or Si 2H 6th grade methane-based gases, SiHCl 3 or SiCl Grade 4 silane chloride series gases, CH 4. C 3H 8. C 2H Grade 2 hydrocarbon gases, (CH) 3SiH or (CH)SiH 3. Organosilicon-based gases. Maintaining the wafer temperature during epitaxial growth within a range of 1400℃ to 1700℃ allows SiC single crystals to grow epitaxially in a parallel direction on the substrate surface. In particular, maintaining the wafer temperature within the range of 1450℃ to 1550℃ facilitates the formation of two-dimensional nuclei of cubic SiC on the seed surface, resulting in a high-quality single-crystal SiC layer. For example, setting the wafer temperature to 1500°C, and using H2O as the carrier gas... The flow rate of 2 is maintained at 5 slm, while SiH 4. At a flow rate of 50 sccm, make C 3H 8. A flow rate of 13 sccm was introduced into the gas-phase growth apparatus, and the pressure inside the reaction vessel was set to 300 hPa. The flow was then introduced onto a positively inclined surface with a 4-degree positive inclination angle, and the flow was accelerated at a speed of 171 μm / hour. The result was that in the direction perpendicular to the substrate (α... z The epitaxial film growth rate was 12 μm / hour on the seed plane of hexagonal SiC. As a result, after 25 minutes of epitaxial growth, a film was grown at a rate of 12 μm / hour on the seed plane of hexagonal SiC. s A 5 μm thick cubic SiC epitaxial growth layer was obtained on [the substrate]. Furthermore, the positive tilt direction (α) of the cubic SiC layer... f The maximum width is 72μm. As described above, according to the SiC multilayer manufacturing method of this embodiment, a single-core cubic SiC layer is generated on a seed surface at a position specified by the vertices of the ridge lines. This allows the cubic SiC layer to flow in a stepped manner in the positive tilt direction according to the positive tilt angle and the film thickness of the SiC epitaxial growth layer formed in the horizontal epitaxial step. Furthermore, it expands in the non-tilted direction along the ridge line at the boundary between the positive and negative tilt surfaces. Therefore, a cubic SiC layer without DBP, conforming to the designed shape and film thickness, can be obtained on the hexagonal SiC epitaxial growth layer. Consequently, power semiconductor devices with low loss and high reliability can be manufactured. [Embodiment 2] By setting a plurality of ridge vertices along a continuous ridge line, hexagonal SiC and cubic SiC can be alternately stacked. However, if the protrusions are arranged in a straight line in a non-tilted direction, the desired multilayer structure cannot be obtained because each seed face expands on the same substrate surface even though it starts from different ridge vertices. Furthermore, since the two-dimensional nuclei of cubic SiC generated on the plurality of seed faces will not all become the same stacked structure, there is a possibility that cubic SiC layers expanding on the same substrate surface will merge, causing DPB (Dual Layer Beads), and thus the effects of the present invention will not be apparent. On the other hand, in the manufacturing method of SiC stack provided by the present invention, the different ridge vertices are configured to not be arranged in a straight line in the non-inclined direction. Therefore, the cubic SiC layers that expand from each ridge vertex will not meet on the same substrate surface, but will be separated by hexagonal SiC layers. Thus, the occurrence of DPB in the cubic SiC layer can be suppressed. The shape of each ridge vertex in this embodiment is the same as that in embodiment 1. However, in order to determine the positional relationship and film thickness of the hexagonal SiC layer and the cubic SiC layer in its stacked structure, the relative positions of the plurality of ridge vertices must be correctly set. The method for manufacturing a SiC laminate provided by this invention can obtain a number of cubic SiC layers equal to the number of ridge vertices formed on hexagonal SiC. Figure 8 is a plan view showing the steps of manufacturing a SiC laminate comprising a two-layer cubic SiC according to this embodiment. As shown in Figure 8(a), a positive tilt surface (P) is formed on a hexagonal SiC substrate. f ) and negative tilt surface (P) r ), and set two ridge line vertices (τ) on its ridge line (J). 1, τ 2). Additionally, ridge valleys (ν) are formed that orient the apex in a positive tilting direction. 1), as from the vertex τ of the ridge line 1 and τ 2. The inflection points of the ridge lines extending in the positive inclination direction. Since the vertices of the multiple ridges must be arranged not in a straight line in the non-inclined direction (αp), τ 1 and τ 2. Configured to pass through the valley point of the ridgeline (ν) 1) A straight line parallel to the non-inclined direction (S) 1) The lengths of the perpendiculars to the vertices of the two ridges are not the same. In this embodiment, from S... 1 to τ Let the length of the perpendicular line from line 1 be a. 1, from S 1 to τ Let the length of the perpendicular line from point 2 be a. 2, then a 2 is a ratio of a The largest value is 1. Therefore, τ 2 is located in the ratio of τ 1. It also needs to be located on the upstream side. When performing the horizontal epitaxial step here, as shown in Figure 8(b), the seed plane P s1 and P s2 They will be respectively based on the vertex τ of the ridge line 1. τ Starting from 2 and tilting in the positive direction (α) f )expand. Continuing with the horizontal epitaxial step, as shown in Figure 8(c), the seed plane P... s1 and P s2The surface area will expand, and there will be two-dimensional cores (γ-rays) of cubic SiC. 1, γ 2) Formation. P s1 The cubic two-dimensional nucleus on it is represented as γ 1. P s2 The two-dimensional kernel on γ is represented as γ 2. Equivalent to each cubic two-dimensional nucleus (γ) 1. γ 2) The end step will tilt in the positive direction (α) f The flow in the direction of ) will also proceed along the ridge line (J) in the positive and negative non-inclined directions (α). p ) expands, while on the positively inclined plane (P) f Two layers of cubic SiC were obtained on the surface. Here, it is assumed that τ... 1 is the starting point of the cubic SiC layer, which is L. c1 Layer, with τ 2 is the starting point of the cubic SiC layer, which is L. c2 The resulting SiC laminate cross-sectional structure is shown in Figure 9, with the ridge vertex (τ) located on the upstream side as an example. 2) The cubic SiC layer (L) as the starting point c2 Compared to the ridge vertex located downstream (τ) 1) The cubic SiC layer (L) as the starting point c1 ) is located in the upper layer, and each cubic SiC layer (L c1 and L c2 ) will be hexagonal SiC layer (L h2 Separate them. Here, L c1 With L c2 The relative positional relationship is determined by the positive tilt angle (θ). f ) and the displacement of the ridge vertex in the negative tilt direction (a) 1. a 2) The only determination, in Figure 9, is from L c1 bottom to L c2 The distance from the bottom (d) 2) Will be d 2=(a 2-a 1)×TAN(θ f For example, if we set it as a positive tilt angle (θ) f ) is 4 degrees, a 2 is 14μm, a If 1 is 10μm, then d 2 can be determined to be 0.28 μm. Additionally, L... c1 The film thickness d of the layer The 1 series is determined to be d 1=d 2×(a 2-a 1) / a 2, therefore d 1 is 0.08μm, sandwiched in L c1 With L c2 The middle hexagonal SiC layer L h2 The thickness is d 2-d 1, so it can be determined to be 0.2μm. The selection method for the SiC wafer, the processing method for the negative tilt surface, and the conditions for the horizontal epitaxial step used in this embodiment are the same as those in Embodiment 1, so their descriptions are omitted. [Implementation Type 3] As shown in Figure 10, this implementation type sets up a plurality of positively inclined surfaces (P). f1 P f2 P f3 ), and connect their respective ends. As a result, a discontinuous plurality of ridge lines (J) are formed. 1. J 2. J 3. J 4). However, the negative slope is not shown in the diagram. At the ridge line J... 1. Configure three ridge lines at the top (τ) 11 τ 12 τ 13). At the ridge line J 2. Configure two ridge tops (τ) 21 τ 22 ). At the ridge line J 3 also features two ridgeline tops (τ) 31 τ 32 However, the tops of all the ridge lines are not in the non-sloping direction (α). p Arranged in a straight line. Additionally, the ridge line (J) 1. J 2. J 3) The angle (Φ) between the angle and the positive tilt direction j The temperature is above 15 degrees and below 86 degrees. When performing the horizontal epitaxial step here, a cubic SiC layer (L... c11 L c12 L c13 ) from P f1 Adjacent ridge lines (J) 1) The top of the ridge line (τ) 11 τ 12 τ 13 Expand to P respectively f2 Above. Cubic SiC layer (L c21 , L c22 ) series as L c13 The lower layer of the layer and from P f2 Adjacent ridge lines (J) 2) The top of the ridge line (τ) 21 τ 22 ) respectively on the positive inclined plane P f3 The upward expansion. Furthermore, the cubic SiC layer (L... c31 L c32 ) series as L c22 The lower layer of the layer and from P f3 Adjacent ridge lines (J) 3) The top of the ridge line (τ) 31 τ 32 ) respectively on the positive inclined plane P f4 Upward expansion. After completing the horizontal epitaxial step, equivalent to M in Figure 10. The cross-section at position 1 is shown in Figure 11(a), forming an L-shaped structure of hexagonal SiC deposited from the bottom layer. h13 L-layer, cubic SiC c13 Layer, hexagonal SiC L h12 L-layer, cubic SiC c12 Layer, hexagonal SiC L h11 L-layer, cubic SiC c11 A layered structure. Equivalent to M in Figure 10. The cross-section at position 2 is shown in Figure 11(b), at M Beneath the layered structure of section 1, L-shaped hexagonal SiC is formed. h22 L-layer, cubic SiC c22 Layer, hexagonal SiC L h21 L-layer, cubic SiC c21 A layered structure. Equivalent to M in Figure 10. The cross-section at position 3 is shown in Figure 11(c), at M Beneath the layered structure of section 2, L-shaped hexagonal SiC is formed. h32 L-layer, cubic SiC c32 Layer, hexagonal SiC L h31 L-layer, cubic SiC c31 The structure is composed of layers and extends to the positively inclined surface P. f4 superior. As described above, by allowing the stepped structure of the inclined surface of the multi-layered SiC stacked structure to flow to the downstream inclined surface, a more multi-layered SiC stacked structure can be formed. Here, the ridgeline deflection angle of the inclined surfaces in regions B and C should be maintained between 15 degrees and 86 degrees, while the non-inclined direction (α) of the inclined surfaces should be kept within this range. p ) and positive tilt direction (α) f The width of the nuclei in cubic SiC is at the critical width (w) where nucleation will occur. c Even if, for example, the SiC layer epitaxially grown on the upstream side contains extended dislocations, these will be expelled onto the positive tilt plane (P). f At the end of the SiC stack, the extended differential structure does not flow to the downstream side, thus reducing the density of basal plane defects (BPD) in the SiC stack. The method for selecting the SiC wafer used in this embodiment, and the negative tilt plane (P) r The processing method, conditions of the horizontal epitaxial step, configuration of each ridge (J), and shape of the ridge vertex (τ) are the same as in Embodiment 1, so their description is omitted. [Example] (Hexagonal SiC substrate) A single-crystal 4H-SiC wafer is prepared having a surface tilted 4 degrees in the [11-20] direction relative to the (0001) face (Si face) of a commercially available 6-inch diameter wafer. Furthermore, a first orientation plane parallel to the (1-100) face is machined at the 6 o'clock position relative to the center of the 4H-SiC wafer, and a second orientation plane parallel to the (11-20) face is machined at the 9 o'clock position. The surface of this wafer is used as the positive tilt surface (P). f In this case, the direction [11-20] is the positive tilt direction (α). f ), [-1-120] direction is negative tilt direction (α) r ), [-1100] direction is the non-tilted direction (α) p Furthermore, a maximum tolerance of 0.5 degrees is allowed between each orientation plane and the surface. (Machining steps for negative inclined surfaces) Figure 12 illustrates the formation of a negative inclined surface (P). r The steps include forming the ridge line (J). First, a positive tilt surface (P) is formed covering the surface of the 4H-SiC wafer (Wf). f The photoresist pattern covers the area of the (0001) plane (Si plane), which is a surface tilted 4 degrees relative to the (0001) plane (Si plane) in the [11-20] direction. Therefore, the positive tilt angle (θ) f The angle is 4 degrees. In this step, a 2 μm thick positive photoresist (Res) is formed on the surface of a 4H-SiC wafer (Wf) using spin coating, as shown in Figure 12(a). Next, a laser plotting apparatus (Heidelberg Instruments DWL2000 GL) is used to shape the surface except for the area corresponding to the positive tilt (P). f The photoresist (Res) outside the area corresponding to the tilted surface is exposed and developed, and as shown in Figure 12(b), an opening of the photoresist (Res) is formed in the area outside the area corresponding to the tilted surface. Then, the opening is etched using an ICP-RIE apparatus (MUC-21) manufactured by Sumitomo Precision Industries, Ltd. During etching, the CF... 4. Gas is supplied at a flow rate of 400 sccm, causing O Gas 2 was introduced at a flow rate of 100 sccm, causing the ICP output to reach 1 kW to generate plasma. Dry etching was performed for 15 minutes to remove a thickness of 0.8 μm, forming a trench. Then, the photoresist (Res) on the 4H-SiC wafer (Wf) was removed using a mixed acid of hydrogen peroxide and sulfuric acid. The sidewalls of the trench had an angle of 80 to 83 degrees relative to the wafer surface, with its positive tilt direction (α)... f The sidewall portion on the [11-20] direction becomes a negative tilt angle (θ). r )Negative tilt planes of 84 to 87 degrees (P r Additionally, the positively tilted surface (P) covered by photoresist (Res) during dry etching. f ) and negative tilt surface (P) r The boundary of ) functions as a ridge line (J). (The shape of the ridge line) The shape of the element pattern that constitutes the exposure shape is shown in Figure 13. The element pattern is the valley of the ridge line at the upper end (ν). 1) It will meet the valley of the lower ridge line (ν) 1) Exposure is performed in a consistent manner in both the non-tilted and positive tilted directions to form ridge lines that continue from the lower end to the upper end of the 4H-SiC wafer (Wf). The width of the positive tilted surface that contacts the pattern of each element is greater than 50 μm. The top of the ridge line (τ) that constitutes the element pattern shown in Figure 13 1. τ 2. τ 3) The positional relationship and ridge line deflection angle are shown in Table 1. Element patterns numbered 1 to 3 conform to the manufacturing method of the SiC laminate provided by this invention. The ridge lines and the positive tilt direction (α) f The included angle of the ridge line is 76 degrees to 81 degrees, and the deviation angle (Φ) is between 76 degrees and 81 degrees. j1 Φ j2 Φ j3 Φ j4 Furthermore, the tops of the three ridges on the ridge line (τ) 1. τ 2. τ 3) The system is configured not to be arranged in a straight line in the non-tilted direction. The ridgeline of element pattern number 4 and the positive tilt direction (α) f The included angle of the ridge line is 71 to 76 degrees, and the deviation angle (Φ) is between 71 and 76 degrees. j1 Φ j2 Φ j3 Φ j4 However, the top of the three ridges on the ridge line (τ) 1. τ 2. τ 3) The configuration of the SiC stacks arranged in a straight line in a non-inclined direction does not conform to the manufacturing method of the SiC stacks provided by this invention. The top of the three ridges on the ridge line of element pattern number 5 (τ) 1. τ 2. τ 3) Although it is configured not to be arranged in a straight line in the non-inclined direction, the ridgeline is aligned with the positive inclination direction (α). f The included angle is the ridge line deviation angle (Φ) of 7 to 11 degrees. j1 Φ j2Φ j3 Φ j4 Therefore, it does not conform to the manufacturing method of SiC stack provided by the present invention. The top of the three ridges on the ridge line of element pattern number 6 (τ) 1. τ 2. τ 3) Although it is configured not to be arranged in a straight line in the non-inclined direction, the ridgeline is aligned with the positive inclination direction (α). f The included angle of the ridge line is 89 degrees, and the deviation angle (Φ) is the ridge line deviation angle. j1 Φ j2 Φ j3 Φ j4 Therefore, it does not conform to the manufacturing method of SiC stack provided by the present invention. Element pattern number 7 a 1. a 2. a 3. a 4 are all 0, which is equivalent to Patent Document 1 not forming the top of the ridge line. Furthermore, the ridge line deflection angle (Φ) j1 Φ j2 Φ j3 Φ j4 All are 90 degrees, and the ridge line (J) is in the non-inclined direction (α). p )parallel. The ridgeline deviation angle (Φ) of element pattern number 8 j1 The angle is 84 degrees, and the ridge line (J) is not perpendicular to the non-inclined direction (α). p Parallel, but a 1. a 3. a 4 is 0, and the top of the ridge line has not been formed. [Table 1] (Horizontal Epitaxial Growth Step) After forming ridges composed of the eight different elemental patterns described above on the same 4H-SiC wafer, SiC epitaxial growth is performed as a horizontal epitaxial growth step. At this time, the wafer temperature is set to 1500℃, and H₂, which is the carrier gas... The flow rate of 2 is maintained at 5 slm, while SiH is... 4. At a flow rate of 50 sccm, C 3H 8. The gas-phase growth apparatus was introduced at a flow rate of 13 sccm, and the pressure inside the reaction vessel was set to 300 hPa, thereby allowing the reaction to proceed at a positive tilt angle of 4 degrees (θ). f The positive inclined plane (P) f The steps flow at a speed of 171 μm / hour, causing the epitaxial film to be perpendicular to the substrate surface (α). z The growth rate was 12 μm / hour. As a result, after 25 minutes, epitaxial growth occurred on the seed plane (P0) of hexagonal SiC. s A 5 μm thick cubic SiC epitaxial growth layer was obtained on [the substrate]. Furthermore, the positive tilt direction (α) of the cubic SiC layer... f The maximum width is 72μm. (Structural Evaluation of SiC Stacks) Following the horizontal epitaxial growth step, scanning electron microscopy (SEM) and transmission electron microscopy (TEM) were used to observe the surface and cross-sectional structures of the SiC epitaxially grown layers, and electron backscattering diffraction (EBSD) was used to observe the crystal structure distribution of SiC. Using this observation, the surface state and DPB density of cubic SiC relative to various pattern elements, as well as the cross-sectional structure of the SiC stacks, were measured. In particular, for the cross-sectional structure of the SiC stacks, the film thickness (d) of the cubic SiC layer was determined by referring to the structure shown in Figure 9. 1) and the spacing (d) of adjacent cubic SiC layers 2) The results are summarized in Table 2. [Table 2] As shown in Table 2, for element patterns 1 to 3, continuous cubic SiC layers in the non-tilted direction were observed on the surface of the SiC laminate, confirming that DPB was not present. Furthermore, a multilayer structure of cubic SiC layers separated by hexagonal SiC layers was observed, and the spacing (d) between adjacent cubic SiC layers was confirmed. 2) Maintaining (a 3-a 2)×TAN(θ f The relationship between the hexagonal SiC and the cubic SiC film thickness (d) is also important. 1) with d 2×a 1 / a 2. The exported values are roughly the same. In the case of element pattern number 4, the surface of the SiC epitaxial growth layer shows the presence of continuous cubic SiC in the non-tilted direction, but EBSD analysis reveals the presence of DBP with a density of 8 / mm. Furthermore, the cubic SiC exists only in the surface layer, with hexagonal SiC beneath it. In the SiC epitaxial growth layers of element pattern numbers 5 and 8, no cubic SiC layer was observed, and the surface of the tilted surface was covered by a 4H-SiC layer. In the cases of element pattern number 6 and number 7, cubic SiC was confirmed to be present on the surface of the SiC epitaxial growth layer, but it was separated in the non-tilted direction, and DBP was observed to be present in the EBSD. As described above, the method for manufacturing SiC multilayers provided by this invention demonstrates that cubic SiC can be reliably generated by setting ridges that form the boundary between the positive and negative tilt surfaces and having ridge vertices protruding in the negative tilt direction. Furthermore, by not arranging the plurality of ridge vertices in a straight line in the non-tilted direction, a multilayer structure of alternating cubic and hexagonal SiC layers can be formed. Moreover, it has been verified that by adjusting the relative arrangement of the plurality of ridge vertices, a SiC multilayer structure most suitable for manufacturing various semiconductor devices such as MOSFETs and HEMTs can be manufactured. The embodiments of the present invention have been described above, but the present invention is not limited to any of the above embodiments and implementation types, and can be implemented in various forms without departing from the spirit of the present invention. For example, the crystalline homogeneous material of hexagonal SiC is not limited to 4H-SiC; cubic SiC layers can be reliably generated using 6H-SiC or 15R-SiC, and their stacking structure can be controlled. The polar surface of the substrate is not limited to the Si surface; the same effect can be obtained by using the C surface as the polar surface. Furthermore, the ridge line does not necessarily have to be a straight line as in this embodiment; the same effect can be obtained as long as the ridge line's deflection angle is within the range of 15 degrees to 86 degrees. The angle of depression relative to the positive and negative tilt surfaces of the ridge line also does not have to be a fixed angle; as long as it is within the range described in this specification, the formation and expansion of the cubic SiC layer can be controlled. Moreover, the temperature and pressure, impurity addition, and gas flow rate of the horizontal epitaxial step are not limited to this embodiment and example; the most suitable conditions can be appropriately adjusted as needed. The vertices of the ridge lines do not necessarily need to be atomically sized protrusions; in fact, a point contact can be considered as a tangent line intersecting both the non-inclined and positively inclined directions with a curvature of less than 10 μm. [Industrial Applicability] The SiC multilayer in this invention can be used as a substrate for power semiconductor devices such as MOSFETs, IGBTs, bipolar transistors, pn diodes, and SBDs, or for high-speed logic circuits and MEMS devices with CMOS architecture. Furthermore, it can leverage the advantages of matched heterojunctions with different band gaps and electron affinities to serve as a substrate for high-frequency devices such as HBTs and HEMTs, or for high-efficiency solar cell units. a 2a 3: The length a of the perpendicular line from the line parallel to the non-inclined direction to the vertex of the ridge. 1a 4: The length of the perpendicular line from a line parallel to the non-inclined direction to the valley point of the ridge. C γ : Inscribed circle d on the seed plane 1: Film thickness d of cubic SiC layer 2: Distance JJ between adjacent cubic SiC layers 1J 2J 3,J 4: Ridge line L h ,L h1 ,L h2 ,L h11 ,L h12 ,L h13 ,L h21 ,L h22 ,L h31 ,L h32 Hexagonal SiC layer L c ,L c1 ,L c2 ,L c11 ,Lc 12 ,Lc 13 ,Lc 21 ,L c22 ,L c31 ,L c32 : cubic SiC layer P b :base surface P f : Positive inclined plane P f1 ,P f2 ,P f3 ,P f4 : Positively inclined surface P r Negative inclined surface P s ,P s1 ,P s2 Seed plane P x :mesa Res: Positive photoresist S 1: Line S x Stepped Wf: 4H-SiC wafer w c : Critical width θ for two-dimensional kernel generation f Positive tilt angle θ r Negative tilt angle α f : Positive tilt direction α r : Negative tilt direction α p : Non-inclined direction α z : The normal direction τ of the base surface 1,τ 2,τ 3: Ridge vertex τ 11 ,τ 12 ,τ 13 ,τ 21 ,τ 22,τ 31 ,τ 32 :Top of the ridgeline Φ j ,Φ j1 ,Φ j2 ,Φ j3 ,Φ j4 : Ridge line deviation angle γ: Two-dimensional nucleus θ of cubic SiC τ : Ridge line curvature angle ν,ν 1: Ridge Valley Point Figure 1 is a perspective view illustrating the microstructure of the mesa and steps formed on the densest facet of Si-C molecules. Figures 2(a) to (d) are cross-sectional and surface views illustrating the steps of a conventional SiC stack manufacturing method. Figures 3(a) and 3(b) are surface and cross-sectional views illustrating why conventional SiC stack manufacturing methods do not form cubic SiC layers. Figure 4 is a perspective view illustrating the fine structure explaining why conventional SiC stack manufacturing methods do not form cubic SiC layers. Figures 5(a) to 5(d) are diagrams showing the steps of forming a cubic SiC layer on a hexagonal SiC layer using the SiC stack manufacturing method provided by the present invention. Figures 6(a) and 6(b) are plan views showing the differences in the two-dimensional nucleus generation process of cubic SiC in the conventional SiC stack manufacturing method and the SiC stack manufacturing method of the present invention. Figure 7 is a plan view and a cross-sectional view illustrating the steps of forming a plurality of cubic SiC layers and hexagonal SiC layers in the manufacturing method of the SiC stack provided by the present invention. Figures 8(a) to (d) are plan views showing the manufacturing steps of the SiC stack according to Embodiment 2 of the present invention. Figure 9 is a cross-sectional view showing the stacked structure of the SiC stack formed in Embodiment 2 of the present invention. Figure 10 is a plan view showing the arrangement of the positive tilt surface and ridge lines in Embodiment 3 of the present invention. Figure 11 is a cross-sectional view showing the stacked structure of the SiC stack formed in Embodiment 3 of the present invention. Figure 12 is a cross-sectional view showing the steps of forming the negative tilt surface and ridge lines in an embodiment of the present invention. Figure 13 is a plan view showing the elemental shapes of the positive tilt surface and ridge lines in an embodiment of the present invention. J: Ridge Line L h Hexagonal SiC layer P b :base surface P f : Positive inclined surface P r Negative inclined surface P s Seed surface w c Critical width for two-dimensional kernel generation θ f Positive tilt angle θ r Negative tilt angle α f Positive tilt direction α r Negative tilt direction α p Non-tilted direction α z : Normal direction of the base surface τ: Vertex of the ridgeline Φ j1 ,Φ j2 : Ridge line deflection angle γ: Two-dimensional core of cubic SiC
Claims
1. A method for manufacturing a SiC laminate, comprising a single-crystal hexagonal SiC layer and a single-crystal cubic SiC layer separated by a matching interface layer, includes: forming a positive tilt surface (P) on a portion of the surface of the aforementioned hexagonal SiC layer. f The steps of the positive inclined surface (P) f ) is relative to the substrate surface (P) of the hexagonal SiC layer b A positive tilt angle (θ) that is greater than 0.5 degrees and less than 30 degrees. f ) relative to the positive tilt direction (α) consistent with either the <11-20> direction or the <1-100> direction. f And tilted; and formed a negative tilt surface (P) r The steps of the negative inclined surface (P) r ) is adjacent to the aforementioned positive tilting surface, and is relative to the negative tilting direction (α) which is opposite to the aforementioned positive tilting direction. r ) relative to the base surface (P) b A negative tilt angle (θ) of 54 degrees or more. r The manufacturing method includes tilting the aforementioned positively tilted surface (P); and the manufacturing method includes tilting the aforementioned positively tilted surface (P) to a more inclined position. f The uppermost part of ) and the aforementioned negative inclined surface (P) r The angle between the line formed by the uppermost points of the two edges, i.e., the ridge line (J), and the aforementioned positive inclination direction, i.e., the ridge line deflection angle (Φ). j The angle is between 15 degrees and 86 degrees, and the aforementioned ridge line (J) is formed by connecting two or more line segments, such that at least one inflection point of the ridge line at the connection of these line segments is in the aforementioned negative inclination direction (α). r The prominent ridge apex (τ), while on the substrate surface (P) of the hexagonal SiC layer. b The horizontal epitaxial growth of SiC is carried out in a parallel direction. The method for manufacturing a SiC multilayer as described in claim 1, wherein... Set two or more of the aforementioned ridge line vertices (τ), and configure each ridge line vertex (τ) so that it is not in the aforementioned positive tilt direction (α). f Orthogonal non-inclined directions (α) p Arrange them in a straight line, and make the distance between adjacent ridge vertices (τ) greater than 0.5μm.
