Method and system for testing three-dimensional semiconductor devices

TW202642185APending Publication Date: 2026-10-16MARVELL ASIA PTE LTD
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Patent Information

Application Number
TW115107211
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-02-27
Filing Date
2026-02-26
Publication Date
2026-10-16

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Abstract

between the dies using bidirectional general purpose input output (GPIO) pads configured for a first signal direction in mission mode. In test mode, at least a subset of the GPIO pads operate in a second signal direction different from the first signal direction to form at least one on-die loopback path
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