Processing system provided with a freedom from interference mechanism

TW202642356APending Publication Date: 2026-10-16RENESAS ELECTRONICS CORP
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Patent Information

Application Number
TW115102294
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-02-11
Filing Date
2026-01-21
Publication Date
2026-10-16

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Abstract

A processing system is provided with a freedom from interference mechanism. The processing system includes a plurality of master components, a plurality slave components; a bus; and a plurality of slave registers. The processing system assigns a master identification to each master component. Each slave register stores a list of permissible master identifications that allow access to a corresponding slave component. Each slave component has a protection circuit configured to permit or prevent access to the slave component based on the master identification of the master component attempting access.
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