Processing-in-memory (PIM) architecture supporting multiple contexts with efficient context switching

TW202642358APending Publication Date: 2026-10-16QUALCOMM INC
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Patent Information

Application Number
TW115102352
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-02-20
Filing Date
2026-01-21
Publication Date
2026-10-16

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Abstract

Systems, methods, devices, and apparatuses are disclosed for supporting and efficiently switching between multiple contexts associated with multiple system-on-a-chip (SoC) clients in a processing-in-memory (PIM) architecture. An example method performed by a memory controller of a PIM device includes: initiating execution of a first task on a first virtual PIM hosted by a first SoC client; receiving, after interrupting the execution of the first task based on a context switching protocol, a first PIM context for the first task; saving the first PIM context to a memory bank of the PIM device; and, after completion of a second task on a second virtual PIM hosted by a second SoC client, restoring, using the first PIM context saved to the memory bank, execution of the first task on the first virtual PIM.
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