Universal flash storage (UFS) link equalization configuration using equalization setting descriptors or setting attributes

Abstract

This disclosure provides systems, methods, and devices for memory systems that support efficiently identifying link equalization configuration settings. A memory controller of a host device couples the host device to a memory system. The memory controller stores a set of of transmitter equalization settings of the host device and the memory system in a transmitter equalization setting descriptor and / or a transmitter equalization setting attributes of the memory system. Upon bootup, the memory controller reads and applies the set of transmitter equalization settings to the host device and the memory system to facilitate high-speed communication over the interface.

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