Memory device

Abstract

This invention provides a memory device capable of reliably reading data. An embodiment of the memory device includes: a memory circuit comprising a memory cell and a sensing amplifier circuit; and a control circuit. The memory cell includes a variable resistor element and a switching element, storing data corresponding to the resistance state of the variable resistor element. The sensing amplifier circuit includes: a first circuit portion through which a first current corresponding to a first value obtained by reading out object data flows; a second circuit portion through which a second current corresponding to a second value obtained by reading out reference data flows; a third circuit portion connected in parallel with the second circuit portion, through which a third current flows; and an output portion that outputs a detection signal based on the relationship between the magnitude of the first current and the magnitude of the combined current of the second and third currents. The control circuit includes an adjustment circuit for adjusting the third current of each component of the sensing amplifier circuit.

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