Serdes transmitter and receiver utilizing single frequency phase amplitude modulation

Abstract

Multiple examples are disclosed of SerDes transmitters and receivers. In one example, a transmitter comprises a mapping block to receive a clock signal and a two-bit data signal and to generate a plurality of pairs of digital values; a plurality of current steering blocks, each of the plurality of current steering blocks receiving one of the plurality of pairs of digital values to generate a pair of currents; a current summer and modulation block to receive the pair of currents from each of the plurality of current steering blocks to generate a differential output signal; wherein the differential output signal is a single frequency pulse amplitude modulated signal wherein the single frequency is a frequency of the clock signal.

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