Semiconductor device and computing system

Abstract

A computing system and semiconductor devices are disclosed for implementing Compute with Memory Stack (CMS) semiconductor hardware (e.g., die, packages, etc.) with an architecture integrating memory and compute on a die, implementing shorter distance high-bandwidth communication between elements, and minimizing data traffic. A semiconductor device includes a first die, the first die including a first compute component, a second compute component, a first set of Through Silicon Vias (TSVs) associated with the first compute component and connecting stacked dies of the device, and a second set of TSVs associated with the second compute component and connecting the stacked dies of the device. The device includes a second die, stacked on the first die. The second die may include a first memory bank module connected to the first compute component using the first set of TSVs, and a second memory bank module connected to the second compute component using the second set of TSVs.

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