Memory device, manufacturing method thereof, and transistor

Abstract

A memory device, a manufacturing method of the memory device, and a transistor are provided. The memory device includes: a semiconductor substrate, comprising a memory region; a plurality of first trenches, defined in the semiconductor substrate; a gate insulating layer and a semi-floating gate, arranged in a corresponding one of the first trenches; a plurality of second trenches, defined in the semiconductor substrate, where each of the second trenches is disposed above multiple first trenches, and each of the second trenches is in communication with multiple first trenches disposed in a same row along a first direction; an inter-gate dielectric layer and a control gate, arranged in a corresponding one of the second trenches in the memory region; a second isolation layer, arranged in the corresponding one of the second trenches, where the second isolation layer is disposed on the control gate, and a top surface of the control gate is lower than a top surface of the semiconductor substrate. By arranging the second isolation layer on the control gate, the top surface of the control gate is lower than the top surface of the semiconductor substrate, such that it may be possible to ensure a distance between the control gate and source / drain.

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