Multi-vt integration schemes for semiconductor devices

Abstract

Multiple threshold voltage (multi-Vt) integration schemes for electronic device manufacture are described. The integration schemes include forming a P-metal stack and an N-metal stack on a substrate; depositing at least one P-metal gate film on the P-metal stack; and depositing at least one N-metal gate film on the N-metal stack. Each of the at least one P-metal gate films independently include one or more of: a tunable thickness configured to provide multi-Vt, or a tunable composition, i.e., a binary metal nitride film or a ternary metal nitride film configured to provide multi-Vt. Each of the at least one N-metal gate films independently include one or more of: a tunable thickness configured to provide multi-Vt, or a tunable composition, i.e., a binary metal carbide film, a binary metal silicide film, a ternary metal carbide film, or a ternary metal silicide film configured to provide multi-Vt.

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