Method of matching multiple chips for forming a system-on-integrated-chips

TW202642847APending Publication Date: 2026-10-16MEDIATEK INC
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Patent Information

Application Number
TW114149195
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-03-31
Filing Date
2025-12-15
Publication Date
2026-10-16

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Abstract

The present disclosure provides a method of matching multiple chips for forming a System-on-Integrated-Chips (SOIC). The method comprising: obtaining a first individual transistor parameter of a first die and a second individual transistor parameter of a second die; wherein both the first individual transistor parameter and the second individual transistor parameter are a first type of transistor parameter, and wherein the first die is associated with a first chip, and the second die is associated with a second chip; matching the first chip and the second chip successfully when the first individual transistor parameter of the first die and the second transistor parameter of the second die satisfy a first predetermined condition.
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