Semiconductor device comprising an intermediate insulating structure

Abstract

A semiconductor device is provided having a lower structure, an upper structure, and an intermediate insulating structure positioned between them. The lower structure contains source / drain regions and active layers with a gate structure disposed above the active layers. The upper structure contains source / drain regions and active layers with a gate structure disposed below the active layers, vertically overlapping the lower gate structure. The intermediate insulating structure includes an insulating structure positioned below the upper structure and a barrier structure on the lower structure. The barrier structure has a barrier insulating layer and a barrier pattern disposed above the barrier insulating layer, the barrier pattern surrounding the insulating structure and contacting lower surfaces of the upper source / drain regions.

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